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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2021-06-01 17:12:50 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-07-20 16:05:56 +0200 |
| commit | 668ca468702e233e33b5fffba5aa11c59c2ee852 (patch) | |
| tree | 0fcf62950c3fe46b3f10c43b0e6e21b367ec64d6 | |
| parent | 884d09d1f18ca9a8c21ce3b7fe228d6ee858a6c7 (diff) | |
| download | linux-stable-668ca468702e233e33b5fffba5aa11c59c2ee852.tar.gz linux-stable-668ca468702e233e33b5fffba5aa11c59c2ee852.tar.bz2 linux-stable-668ca468702e233e33b5fffba5aa11c59c2ee852.zip | |
arm64: dts: renesas: r8a779a0: Drop power-domains property from GIC node
[ Upstream commit 1771a33b34421050c7b830f0a8af703178ba9d36 ]
"make dtbs_check":
arm64/boot/dts/renesas/r8a779a0-falcon.dt.yaml: interrupt-controller@f1000000: 'power-domains' does not match any of the regexes: '^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$', '^gic-its@', '^interrupt-controller@[0-9a-f]+$', 'pinctrl-[0-9]+'
From schema: Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
Remove the "power-domains" property, as the GIC on R-Car V3U is
always-on, and not part of a clock domain.
Fixes: 834c310f541839b6 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/a9ae5cbc7c586bf2c6b18ddc665ad7051bd1d206.1622560236.git.geert+renesas@glider.be
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/r8a779a0.dtsi | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi index 86ec32a919d2..bfbb53bf5375 100644 --- a/arch/arm64/boot/dts/renesas/r8a779a0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a779a0.dtsi @@ -111,7 +111,6 @@ <0x0 0xf1060000 0 0x110000>; interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; - power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; }; prr: chipid@fff00044 { |