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| author | Om Prakash Singh <omp@nvidia.com> | 2021-06-23 15:35:22 +0530 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-09-22 12:28:00 +0200 |
| commit | d5c5d1b141faee0be01c93f48f2b714838004ef1 (patch) | |
| tree | d31e030d06e228067af4c77a7486d3f9eec09713 | |
| parent | 13f366bab07724d12c8ed73977870c0a9e964ad7 (diff) | |
| download | linux-stable-d5c5d1b141faee0be01c93f48f2b714838004ef1.tar.gz linux-stable-d5c5d1b141faee0be01c93f48f2b714838004ef1.tar.bz2 linux-stable-d5c5d1b141faee0be01c93f48f2b714838004ef1.zip | |
PCI: tegra194: Fix MSI-X programming
[ Upstream commit 43537cf7e351264a1f05ed42ad402942bfc9140e ]
Lower order MSI-X address is programmed in MSIX_ADDR_MATCH_HIGH_OFF
DBI register instead of higher order address. This patch fixes this
programming mistake.
Link: https://lore.kernel.org/r/20210623100525.19944-3-omp@nvidia.com
Signed-off-by: Om Prakash Singh <omp@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | drivers/pci/controller/dwc/pcie-tegra194.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index c2827a8d208f..a5b677ec0769 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1778,7 +1778,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie) val = (ep->msi_mem_phys & MSIX_ADDR_MATCH_LOW_OFF_MASK); val |= MSIX_ADDR_MATCH_LOW_OFF_EN; dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_LOW_OFF, val); - val = (lower_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK); + val = (upper_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK); dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_HIGH_OFF, val); ret = dw_pcie_ep_init_complete(ep); |