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| author | Dmitry Osipenko <digetx@gmail.com> | 2019-06-18 17:03:56 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2019-07-26 09:10:36 +0200 |
| commit | c21c81b6207767a4d161dbed698ab88550f08014 (patch) | |
| tree | 181309a4d08e0c23e0f9957c93adf4f7602a185f | |
| parent | 848ae42e2332c45381c0297261a0351369a05d42 (diff) | |
| download | linux-stable-c21c81b6207767a4d161dbed698ab88550f08014.tar.gz linux-stable-c21c81b6207767a4d161dbed698ab88550f08014.tar.bz2 linux-stable-c21c81b6207767a4d161dbed698ab88550f08014.zip | |
clocksource/drivers/tegra: Restore base address before cleanup
[ Upstream commit fc9babc2574691d3bbf0428f007b22261fed55c6 ]
We're adjusting the timer's base for each per-CPU timer to point to the
actual start of the timer since device-tree defines a compound registers
range that includes all of the timers. In this case the original base
need to be restore before calling iounmap to unmap the proper address.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
| -rw-r--r-- | drivers/clocksource/timer-tegra20.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clocksource/timer-tegra20.c b/drivers/clocksource/timer-tegra20.c index fe5cc0963ac9..462be34b41c4 100644 --- a/drivers/clocksource/timer-tegra20.c +++ b/drivers/clocksource/timer-tegra20.c @@ -319,6 +319,8 @@ out_irq: irq_dispose_mapping(cpu_to->clkevt.irq); } } + + to->of_base.base = timer_reg_base; out: timer_of_cleanup(to); return ret; |