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| author | Samuel Holland <samuel@sholland.org> | 2022-05-08 20:21:21 -0500 |
|---|---|---|
| committer | Daniel Lezcano <daniel.lezcano@linaro.org> | 2022-05-18 11:08:52 +0200 |
| commit | 232ccac1bd9b5bfe73895f527c08623e7fa0752d (patch) | |
| tree | 95ada85f1c62b85ce0b6672fe1021f1e09247288 | |
| parent | 41929c9f628b9990d33a200c54bb0c919e089aa8 (diff) | |
| download | linux-stable-232ccac1bd9b5bfe73895f527c08623e7fa0752d.tar.gz linux-stable-232ccac1bd9b5bfe73895f527c08623e7fa0752d.tar.bz2 linux-stable-232ccac1bd9b5bfe73895f527c08623e7fa0752d.zip | |
clocksource/drivers/riscv: Events are stopped during CPU suspend
Some implementations of the SBI time extension depend on hart-local
state (for example, CSRs) that are lost or hardware that is powered
down when a CPU is suspended. To be safe, the clockevents driver
cannot assume that timer IRQs will be received during CPU suspend.
Fixes: 62b019436814 ("clocksource: new RISC-V SBI timer driver")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20220509012121.40031-1-samuel@sholland.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
| -rw-r--r-- | drivers/clocksource/timer-riscv.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clocksource/timer-riscv.c b/drivers/clocksource/timer-riscv.c index 1767f8bf2013..593d5a957b69 100644 --- a/drivers/clocksource/timer-riscv.c +++ b/drivers/clocksource/timer-riscv.c @@ -34,7 +34,7 @@ static int riscv_clock_next_event(unsigned long delta, static unsigned int riscv_clock_event_irq; static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = { .name = "riscv_timer_clockevent", - .features = CLOCK_EVT_FEAT_ONESHOT, + .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP, .rating = 100, .set_next_event = riscv_clock_next_event, }; |