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| author | Christophe Leroy <christophe.leroy@csgroup.eu> | 2024-08-20 14:42:38 +0200 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2024-08-22 22:52:29 +1000 |
| commit | d92b5cc29c792f1d3f0aaa3b29dddfe816c03e88 (patch) | |
| tree | ee85edfbc2e0e82fe0ef71fd9d36b26d7b765056 | |
| parent | 227bbaabe64b6f9cd98aa051454c1d4a194a8c6a (diff) | |
| download | linux-stable-d92b5cc29c792f1d3f0aaa3b29dddfe816c03e88.tar.gz linux-stable-d92b5cc29c792f1d3f0aaa3b29dddfe816c03e88.tar.bz2 linux-stable-d92b5cc29c792f1d3f0aaa3b29dddfe816c03e88.zip | |
powerpc/64e: Define mmu_pte_psize static
mmu_pte_psize is only used in the tlb_64e.c, define it static.
Fixes: 25d21ad6e799 ("powerpc: Add TLB management code for 64-bit Book3E")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202408011256.1O99IB0s-lkp@intel.com/
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://msgid.link/beb30d280eaa5d857c38a0834b147dffd6b28aa9.1724157750.git.christophe.leroy@csgroup.eu
| -rw-r--r-- | arch/powerpc/mm/nohash/tlb_64e.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/mm/nohash/tlb_64e.c b/arch/powerpc/mm/nohash/tlb_64e.c index 113edf76d3ce..d26656b07b72 100644 --- a/arch/powerpc/mm/nohash/tlb_64e.c +++ b/arch/powerpc/mm/nohash/tlb_64e.c @@ -33,7 +33,7 @@ * though this will probably be made common with other nohash * implementations at some point */ -int mmu_pte_psize; /* Page size used for PTE pages */ +static int mmu_pte_psize; /* Page size used for PTE pages */ int mmu_vmemmap_psize; /* Page size used for the virtual mem map */ int book3e_htw_mode; /* HW tablewalk? Value is PPC_HTW_* */ unsigned long linear_map_top; /* Top of linear mapping */ |