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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2024-02-18 15:56:34 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2024-04-03 15:11:54 +0200 |
| commit | 89b4efca4af06b3526c9e70596ce050e7ab43453 (patch) | |
| tree | d16451247ed3ea4031e0bbc31c8c1a7a58d1bccc | |
| parent | e955e8a7f38a856fc6534ba4e6bffd4d5cc80ac3 (diff) | |
| download | linux-stable-89b4efca4af06b3526c9e70596ce050e7ab43453.tar.gz linux-stable-89b4efca4af06b3526c9e70596ce050e7ab43453.tar.bz2 linux-stable-89b4efca4af06b3526c9e70596ce050e7ab43453.zip | |
scsi: ufs: qcom: Provide default cycles_in_1us value
commit 81e2c1a0f8d3f62f4c9e80b20270aa3481c40524 upstream.
The MSM8996 DT doesn't provide frequency limits for the core_clk_unipro
clock, which results in miscalculation of the cycles_in_1us value. Provide
the backwards-compatible default to support existing MSM8996 DT files.
Fixes: b4e13e1ae95e ("scsi: ufs: qcom: Add multiple frequency support for MAX_CORE_CLK_1US_CYCLES")
Cc: Nitin Rawat <quic_nitirawa@quicinc.com>
Cc: stable@vger.kernel.org # 6.7.x
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240218-msm8996-fix-ufs-v3-1-40aab49899a3@linaro.org
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | drivers/ufs/host/ufs-qcom.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 0f4b3f16d3d7..0d3886455375 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1397,8 +1397,10 @@ static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up) list_for_each_entry(clki, head, list) { if (!IS_ERR_OR_NULL(clki->clk) && - !strcmp(clki->name, "core_clk_unipro")) { - if (is_scale_up) + !strcmp(clki->name, "core_clk_unipro")) { + if (!clki->max_freq) + cycles_in_1us = 150; /* default for backwards compatibility */ + else if (is_scale_up) cycles_in_1us = ceil(clki->max_freq, (1000 * 1000)); else cycles_in_1us = ceil(clk_get_rate(clki->clk), (1000 * 1000)); |