diff options
author | Len Brown <len.brown@intel.com> | 2007-08-16 03:34:22 -0400 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2007-08-21 00:33:35 -0400 |
commit | 61ec7567db103d537329b0db9a887db570431ff4 (patch) | |
tree | 7287eb4bd00c09434fc2dd0babadfd0eb7ddc832 | |
parent | 28e8351ac22de25034e048c680014ad824323c65 (diff) | |
download | linux-stable-61ec7567db103d537329b0db9a887db570431ff4.tar.gz linux-stable-61ec7567db103d537329b0db9a887db570431ff4.tar.bz2 linux-stable-61ec7567db103d537329b0db9a887db570431ff4.zip |
ACPI: boot correctly with "nosmp" or "maxcpus=0"
In MPS mode, "nosmp" and "maxcpus=0" boot a UP kernel with IOAPIC disabled.
However, in ACPI mode, these parameters didn't completely disable
the IO APIC initialization code and boot failed.
init/main.c:
Disable the IO_APIC if "nosmp" or "maxcpus=0"
undefine disable_ioapic_setup() when it doesn't apply.
i386:
delete ioapic_setup(), it was a duplicate of parse_noapic()
delete undefinition of disable_ioapic_setup()
x86_64:
rename disable_ioapic_setup() to parse_noapic() to match i386
define disable_ioapic_setup() in header to match i386
http://bugzilla.kernel.org/show_bug.cgi?id=1641
Acked-by: Andi Kleen <ak@suse.de>
Signed-off-by: Len Brown <len.brown@intel.com>
-rw-r--r-- | Documentation/kernel-parameters.txt | 15 | ||||
-rw-r--r-- | arch/i386/kernel/io_apic.c | 8 | ||||
-rw-r--r-- | arch/x86_64/kernel/io_apic.c | 8 | ||||
-rw-r--r-- | include/asm-i386/io_apic.h | 1 | ||||
-rw-r--r-- | include/asm-x86_64/io_apic.h | 6 | ||||
-rw-r--r-- | init/main.c | 12 |
6 files changed, 25 insertions, 25 deletions
diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt index 975f029be25c..17770b456310 100644 --- a/Documentation/kernel-parameters.txt +++ b/Documentation/kernel-parameters.txt @@ -952,14 +952,10 @@ and is between 256 and 4096 characters. It is defined in the file Format: <1-256> maxcpus= [SMP] Maximum number of processors that an SMP kernel - should make use of. - Using "nosmp" or "maxcpus=0" will disable SMP - entirely (the MPS table probe still happens, though). - A command-line option of "maxcpus=<NUM>", where <NUM> - is an integer greater than 0, limits the maximum number - of CPUs activated in SMP mode to <NUM>. - Using "maxcpus=1" on an SMP kernel is the trivial - case of an SMP kernel with only one CPU. + should make use of. maxcpus=n : n >= 0 limits the + kernel to using 'n' processors. n=0 is a special case, + it is equivalent to "nosmp", which also disables + the IO APIC. max_addr=[KMG] [KNL,BOOT,ia64] All physical memory greater than or equal to this physical address is ignored. @@ -1184,7 +1180,8 @@ and is between 256 and 4096 characters. It is defined in the file nosep [BUGS=X86-32] Disables x86 SYSENTER/SYSEXIT support. - nosmp [SMP] Tells an SMP kernel to act as a UP kernel. + nosmp [SMP] Tells an SMP kernel to act as a UP kernel, + and disable the IO APIC. legacy for "maxcpus=0". nosoftlockup [KNL] Disable the soft-lockup detector. diff --git a/arch/i386/kernel/io_apic.c b/arch/i386/kernel/io_apic.c index 4b8a8da4b2e0..e2f4a1c68547 100644 --- a/arch/i386/kernel/io_apic.c +++ b/arch/i386/kernel/io_apic.c @@ -754,14 +754,6 @@ static int pirq_entries [MAX_PIRQS]; static int pirqs_enabled; int skip_ioapic_setup; -static int __init ioapic_setup(char *str) -{ - skip_ioapic_setup = 1; - return 1; -} - -__setup("noapic", ioapic_setup); - static int __init ioapic_pirq_setup(char *str) { int i, max; diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c index f57f8b901912..966fa1062491 100644 --- a/arch/x86_64/kernel/io_apic.c +++ b/arch/x86_64/kernel/io_apic.c @@ -397,14 +397,12 @@ static void clear_IO_APIC (void) int skip_ioapic_setup; int ioapic_force; -/* dummy parsing: see setup.c */ - -static int __init disable_ioapic_setup(char *str) +static int __init parse_noapic(char *str) { - skip_ioapic_setup = 1; + disable_ioapic_setup(); return 0; } -early_param("noapic", disable_ioapic_setup); +early_param("noapic", parse_noapic); /* Actually the next is obsolete, but keep it for paranoid reasons -AK */ static int __init disable_timer_pin_setup(char *arg) diff --git a/include/asm-i386/io_apic.h b/include/asm-i386/io_apic.h index 340764076d5f..dbe734ddf2af 100644 --- a/include/asm-i386/io_apic.h +++ b/include/asm-i386/io_apic.h @@ -150,7 +150,6 @@ extern int (*ioapic_renumber_irq)(int ioapic, int irq); #else /* !CONFIG_X86_IO_APIC */ #define io_apic_assign_pci_irqs 0 -static inline void disable_ioapic_setup(void) { } #endif #endif diff --git a/include/asm-x86_64/io_apic.h b/include/asm-x86_64/io_apic.h index 969d225a9350..d9f2e54324d5 100644 --- a/include/asm-x86_64/io_apic.h +++ b/include/asm-x86_64/io_apic.h @@ -109,6 +109,12 @@ extern int mpc_default_type; /* 1 if "noapic" boot option passed */ extern int skip_ioapic_setup; +static inline void disable_ioapic_setup(void) +{ + skip_ioapic_setup = 1; +} + + /* * If we use the IO-APIC for IRQ routing, disable automatic * assignment of PCI IRQ's. diff --git a/init/main.c b/init/main.c index d3bcb3b11620..cc0653ec081d 100644 --- a/init/main.c +++ b/init/main.c @@ -146,9 +146,14 @@ static unsigned int __initdata max_cpus = NR_CPUS; * greater than 0, limits the maximum number of CPUs activated in * SMP mode to <NUM>. */ +#ifndef CONFIG_X86_IO_APIC +static inline void disable_ioapic_setup(void) {}; +#endif + static int __init nosmp(char *str) { max_cpus = 0; + disable_ioapic_setup(); return 0; } @@ -157,10 +162,13 @@ early_param("nosmp", nosmp); static int __init maxcpus(char *str) { get_option(&str, &max_cpus); - return 1; + if (max_cpus == 0) + disable_ioapic_setup(); + + return 0; } -__setup("maxcpus=", maxcpus); +early_param("maxcpus=", maxcpus); #else #define max_cpus NR_CPUS #endif |