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authorOlof Johansson <olof@lixom.net>2013-04-14 20:49:21 -0700
committerOlof Johansson <olof@lixom.net>2013-04-14 20:49:28 -0700
commitb56a7f9206efa2982140837e36aca88cfedd66bc (patch)
treea1270fbf47cbaf6e056b2a06ede71cd622df987a /Documentation/devicetree/bindings/arm
parent56c5c13f7080f9299a92b3fb6a1bf22689d607cc (diff)
parente25e3d1fef2c57e49aef64535341c15fe2b29b4a (diff)
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Merge tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm into next/soc
From David Brown: Patches for MSM core These patches are changes to the MSM timer code that will be for upcoming targets, including a generalization of the binding and preventing a missing timer interrupt. * tag 'msm-core-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm: ARM: msm: Wait for timer clear to complete ARM: msm: Rework timer binding to be more general Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'Documentation/devicetree/bindings/arm')
-rw-r--r--Documentation/devicetree/bindings/arm/msm/timer.txt41
1 files changed, 20 insertions, 21 deletions
diff --git a/Documentation/devicetree/bindings/arm/msm/timer.txt b/Documentation/devicetree/bindings/arm/msm/timer.txt
index 8c5907b9cae8..c6ef8f13dc7e 100644
--- a/Documentation/devicetree/bindings/arm/msm/timer.txt
+++ b/Documentation/devicetree/bindings/arm/msm/timer.txt
@@ -3,36 +3,35 @@
Properties:
- compatible : Should at least contain "qcom,msm-timer". More specific
- properties such as "qcom,msm-gpt" and "qcom,msm-dgt" specify a general
- purpose timer and a debug timer respectively.
+ properties specify which subsystem the timers are paired with.
-- interrupts : Interrupt indicating a match event.
+ "qcom,kpss-timer" - krait subsystem
+ "qcom,scss-timer" - scorpion subsystem
-- reg : Specifies the base address of the timer registers. The second region
- specifies an optional register used to configure the clock divider.
+- interrupts : Interrupts for the the debug timer, the first general purpose
+ timer, and optionally a second general purpose timer in that
+ order.
-- clock-frequency : The frequency of the timer in Hz.
+- reg : Specifies the base address of the timer registers.
+
+- clock-frequency : The frequency of the debug timer and the general purpose
+ timer(s) in Hz in that order.
Optional:
- cpu-offset : per-cpu offset used when the timer is accessed without the
- CPU remapping facilities. The offset is cpu-offset * cpu-nr.
+ CPU remapping facilities. The offset is
+ cpu-offset + (0x10000 * cpu-nr).
Example:
- timer@200a004 {
- compatible = "qcom,msm-gpt", "qcom,msm-timer";
- interrupts = <1 2 0x301>;
- reg = <0x0200a004 0x10>;
- clock-frequency = <32768>;
- cpu-offset = <0x40000>;
- };
-
- timer@200a024 {
- compatible = "qcom,msm-dgt", "qcom,msm-timer";
- interrupts = <1 3 0x301>;
- reg = <0x0200a024 0x10>,
- <0x0200a034 0x4>;
- clock-frequency = <6750000>;
+ timer@200a000 {
+ compatible = "qcom,scss-timer", "qcom,msm-timer";
+ interrupts = <1 1 0x301>,
+ <1 2 0x301>,
+ <1 3 0x301>;
+ reg = <0x0200a000 0x100>;
+ clock-frequency = <19200000>,
+ <32768>;
cpu-offset = <0x40000>;
};