diff options
author | Tarek Dakhran <t.dakhran@samsung.com> | 2014-05-27 06:54:12 +0900 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2014-05-31 02:13:16 +0900 |
commit | e7ef0b632eb45b0c725629da3561ecde8935a398 (patch) | |
tree | 478c68112bc42ba39b2506f56b4468d54b53daa1 /Documentation/devicetree/bindings/clock/exynos5410-clock.txt | |
parent | bfed1074f213051e94648bfad0d0611a16d81366 (diff) | |
download | linux-stable-e7ef0b632eb45b0c725629da3561ecde8935a398.tar.gz linux-stable-e7ef0b632eb45b0c725629da3561ecde8935a398.tar.bz2 linux-stable-e7ef0b632eb45b0c725629da3561ecde8935a398.zip |
clk: exynos5410: register clocks using common clock framework
The EXYNOS5410 clocks are statically listed and registered
using the Samsung specific common clock helper functions.
Signed-off-by: Tarek Dakhran <t.dakhran@samsung.com>
Signed-off-by: Vyacheslav Tyrtov <v.tyrtov@samsung.com>
Reviewed-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/exynos5410-clock.txt')
-rw-r--r-- | Documentation/devicetree/bindings/clock/exynos5410-clock.txt | 45 |
1 files changed, 45 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/exynos5410-clock.txt b/Documentation/devicetree/bindings/clock/exynos5410-clock.txt new file mode 100644 index 000000000000..aeab635b07b5 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/exynos5410-clock.txt @@ -0,0 +1,45 @@ +* Samsung Exynos5410 Clock Controller + +The Exynos5410 clock controller generates and supplies clock to various +controllers within the Exynos5410 SoC. + +Required Properties: + +- compatible: should be "samsung,exynos5410-clock" + +- reg: physical base address of the controller and length of memory mapped + region. + +- #clock-cells: should be 1. + +All available clocks are defined as preprocessor macros in +dt-bindings/clock/exynos5410.h header and can be used in device +tree sources. + +External clock: + +There is clock that is generated outside the SoC. It +is expected that it is defined using standard clock bindings +with following clock-output-name: + + - "fin_pll" - PLL input clock from XXTI + +Example 1: An example of a clock controller node is listed below. + + clock: clock-controller@0x10010000 { + compatible = "samsung,exynos5410-clock"; + reg = <0x10010000 0x30000>; + #clock-cells = <1>; + }; + +Example 2: UART controller node that consumes the clock generated by the clock + controller. Refer to the standard clock bindings for information + about 'clocks' and 'clock-names' property. + + serial@12C20000 { + compatible = "samsung,exynos4210-uart"; + reg = <0x12C00000 0x100>; + interrupts = <0 51 0>; + clocks = <&clock CLK_UART0>, <&clock CLK_SCLK_UART0>; + clock-names = "uart", "clk_uart_baud0"; + }; |