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author | Jiancheng Xue <xuejiancheng@hisilicon.com> | 2016-10-29 14:13:37 +0800 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-11-11 15:43:49 -0800 |
commit | 707d33cb0b731472b7564d9fad8d45cbbd7fece3 (patch) | |
tree | 763dca679d262fc8ec1a3222c0caac6500e92966 /Documentation/devicetree/bindings/clock/hisi-crg.txt | |
parent | 1001354ca34179f3db924eb66672442a173147dc (diff) | |
download | linux-stable-707d33cb0b731472b7564d9fad8d45cbbd7fece3.tar.gz linux-stable-707d33cb0b731472b7564d9fad8d45cbbd7fece3.tar.bz2 linux-stable-707d33cb0b731472b7564d9fad8d45cbbd7fece3.zip |
clk: hisilicon: add CRG driver for Hi3798CV200 SoC
Add CRG driver for Hi3798CV200 SoC. CRG(Clock and Reset
Generator) module generates clock and reset signals used
by other module blocks on SoC.
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/hisi-crg.txt')
-rw-r--r-- | Documentation/devicetree/bindings/clock/hisi-crg.txt | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/hisi-crg.txt b/Documentation/devicetree/bindings/clock/hisi-crg.txt new file mode 100644 index 000000000000..cc60b3d423f3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/hisi-crg.txt @@ -0,0 +1,50 @@ +* HiSilicon Clock and Reset Generator(CRG) + +The CRG module provides clock and reset signals to various +modules within the SoC. + +This binding uses the following bindings: + Documentation/devicetree/bindings/clock/clock-bindings.txt + Documentation/devicetree/bindings/reset/reset.txt + +Required Properties: + +- compatible: should be one of the following. + - "hisilicon,hi3516cv300-crg" + - "hisilicon,hi3516cv300-sysctrl" + - "hisilicon,hi3519-crg" + - "hisilicon,hi3798cv200-crg" + - "hisilicon,hi3798cv200-sysctrl" + +- reg: physical base address of the controller and length of memory mapped + region. + +- #clock-cells: should be 1. + +Each clock is assigned an identifier and client nodes use this identifier +to specify the clock which they consume. + +All these identifier could be found in <dt-bindings/clock/hi3519-clock.h>. + +- #reset-cells: should be 2. + +A reset signal can be controlled by writing a bit register in the CRG module. +The reset specifier consists of two cells. The first cell represents the +register offset relative to the base address. The second cell represents the +bit index in the register. + +Example: CRG nodes +CRG: clock-reset-controller@12010000 { + compatible = "hisilicon,hi3519-crg"; + reg = <0x12010000 0x10000>; + #clock-cells = <1>; + #reset-cells = <2>; +}; + +Example: consumer nodes +i2c0: i2c@12110000 { + compatible = "hisilicon,hi3519-i2c"; + reg = <0x12110000 0x1000>; + clocks = <&CRG HI3519_I2C0_RST>; + resets = <&CRG 0xe4 0>; +}; |