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authorSibi Sankar <sibis@codeaurora.org>2018-12-29 00:23:01 +0530
committerBjorn Andersson <bjorn.andersson@linaro.org>2019-01-06 23:02:13 -0800
commit2808cd5e798d22e3f25ddfaddcde9b507c840d1e (patch)
treed0aa40db3706bdd036b869980200745ffc0261d0 /Documentation
parentfff7fca51d400e67403efacf25612d8690e939c1 (diff)
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dt-bindings: remoteproc: qcom: Add missing clocks for SDM845
Add missing clock bindings for Q6V5 MSS on SDM845 SoCs. Fixes: fb22022ff63d ("dt-bindings: remoteproc: Add Q6v5 Modem PIL binding for SDM845") Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt14
1 files changed, 11 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
index 9ff5b0309417..d645c8db29fd 100644
--- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
+++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt
@@ -39,13 +39,21 @@ on the Qualcomm Hexagon core.
- clocks:
Usage: required
Value type: <phandle>
- Definition: reference to the iface, bus and mem clocks to be held on
- behalf of the booting of the Hexagon core
+ Definition: reference to the clocks that match clock-names
- clock-names:
Usage: required
Value type: <stringlist>
- Definition: must be "iface", "bus", "mem"
+ Definition: The clocks needed depend on the compatible string:
+ qcom,ipq8074-wcss-pil:
+ no clock names required
+ qcom,q6v5-pil:
+ qcom,msm8916-mss-pil:
+ qcom,msm8974-mss-pil:
+ must be "iface", "bus", "mem", "xo"
+ qcom,sdm845-mss-pil:
+ must be "iface", "bus", "mem", "xo", "gpll0_mss",
+ "snoc_axi", "mnoc_axi", "prng"
- resets:
Usage: required