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| author | Paul Mackerras <paulus@ozlabs.org> | 2016-11-07 15:09:58 +1100 |
|---|---|---|
| committer | Ben Hutchings <ben@decadent.org.uk> | 2017-03-16 02:26:24 +0000 |
| commit | 50bf72d08f1aeac1b398307003d5fe6608f3a499 (patch) | |
| tree | 33d5a610816e0876ff62a73afcb0d0f394a8677a /Documentation | |
| parent | 0a295bf1d1aab79a115af903278f749dd64fe55d (diff) | |
| download | linux-stable-50bf72d08f1aeac1b398307003d5fe6608f3a499.tar.gz linux-stable-50bf72d08f1aeac1b398307003d5fe6608f3a499.tar.bz2 linux-stable-50bf72d08f1aeac1b398307003d5fe6608f3a499.zip | |
KVM: PPC: Book3S HV: Save/restore XER in checkpointed register state
commit 0d808df06a44200f52262b6eb72bcb6042f5a7c5 upstream.
When switching from/to a guest that has a transaction in progress,
we need to save/restore the checkpointed register state. Although
XER is part of the CPU state that gets checkpointed, the code that
does this saving and restoring doesn't save/restore XER.
This fixes it by saving and restoring the XER. To allow userspace
to read/write the checkpointed XER value, we also add a new ONE_REG
specifier.
The visible effect of this bug is that the guest may see its XER
value being corrupted when it uses transactions.
Fixes: e4e38121507a ("KVM: PPC: Book3S HV: Add transactional memory support")
Fixes: 0a8eccefcb34 ("KVM: PPC: Book3S HV: Add missing code for transaction reclaim on guest exit")
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
[bwh: Backported to 3.16: adjust context, spacing]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/virtual/kvm/api.txt | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/virtual/kvm/api.txt b/Documentation/virtual/kvm/api.txt index 769c2cb7f9b3..e86da4377402 100644 --- a/Documentation/virtual/kvm/api.txt +++ b/Documentation/virtual/kvm/api.txt @@ -1891,6 +1891,7 @@ registers, find a list below: PPC | KVM_REG_PPC_TM_VSCR | 32 PPC | KVM_REG_PPC_TM_DSCR | 64 PPC | KVM_REG_PPC_TM_TAR | 64 + PPC | KVM_REG_PPC_TM_XER | 64 ARM registers are mapped using the lower 32 bits. The upper 16 of that is the register group type, or coprocessor number: |