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author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-01-28 11:00:08 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-01-28 11:00:08 -0800 |
commit | ef1dce990b06a3f5bf4f71100891686b5d3f7c7e (patch) | |
tree | 22d25cfec318d544a10f1a64738e40e2792ff836 /Documentation | |
parent | 1b1bc42c1692e9b62756323c675a44cb1a1f9dbd (diff) | |
parent | 9aed02feae57bf7a40cb04ea0e3017cb7a998db4 (diff) | |
download | linux-stable-ef1dce990b06a3f5bf4f71100891686b5d3f7c7e.tar.gz linux-stable-ef1dce990b06a3f5bf4f71100891686b5d3f7c7e.tar.bz2 linux-stable-ef1dce990b06a3f5bf4f71100891686b5d3f7c7e.zip |
Merge tag 'arc-4.10-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc
Pull ARC fixes from Vineet Gupta:
"Hopefully last set of changes for ARC for 4.10:
- fix for unaligned access emulation corner case
- fix for udelay loop inline asm regression
- fix irq affinity finally for AXS103 board [Yuriy]
- final fixes for setting IO-coherency sanely in SMP"
* tag 'arc-4.10-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc:
ARC: [arcompact] handle unaligned access delay slot corner case
ARCv2: smp-boot: wake_flag polling by non-Masters needs to be uncached
ARC: smp-boot: Decouple Non masters waiting API from jump to entry point
ARCv2: MCIP: update the BCR per current changes
ARC: udelay: fix inline assembler by adding LP_COUNT to clobber list
ARCv2: MCIP: Deprecate setting of affinity in Device Tree
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt index 0dcb7c7d3e40..944657684d73 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt @@ -15,6 +15,9 @@ Properties: Second cell specifies the irq distribution mode to cores 0=Round Robin; 1=cpu0, 2=cpu1, 4=cpu2, 8=cpu3 + The second cell in interrupts property is deprecated and may be ignored by + the kernel. + intc accessed via the special ARC AUX register interface, hence "reg" property is not specified. |