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| author | Dave Airlie <airlied@redhat.com> | 2016-11-16 09:39:55 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2016-11-16 09:39:55 +1000 |
| commit | 4473904ccd7fc27b7e9e575c36dc709617a3eb85 (patch) | |
| tree | 58be4542b362c7c498cbc7bb55aa5091f74374b1 /Documentation | |
| parent | 1a3865d64a0d8151c7fe23f4b57a587615ccc5bb (diff) | |
| parent | 47d7fbb32c57c8d1722a3e9bd21e501e80fd0741 (diff) | |
| download | linux-stable-4473904ccd7fc27b7e9e575c36dc709617a3eb85.tar.gz linux-stable-4473904ccd7fc27b7e9e575c36dc709617a3eb85.tar.bz2 linux-stable-4473904ccd7fc27b7e9e575c36dc709617a3eb85.zip | |
Merge tag 'sunxi-drm-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into drm-next
sun4i-drm changes for 4.10
Support for the Allwinner A31 SoC display engine using the sun4i-drm
driver.
* tag 'sunxi-drm-for-4.10' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
drm/sun4i: Add a few formats
drm/sun4i: Add compatible strings for A31/A31s display pipelines
drm/sun4i: Add compatible string for A31/A31s TCON (timing controller)
drm/sun4i: tcon: Move SoC specific quirks to a DT matched data structure
drm/sun4i: sun6i-drc: Support DRC on A31 and A31s
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index b95696d748c7..b82c00449468 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -28,6 +28,8 @@ The TCON acts as a timing controller for RGB, LVDS and TV interfaces. Required properties: - compatible: value must be either: * allwinner,sun5i-a13-tcon + * allwinner,sun6i-a31-tcon + * allwinner,sun6i-a31s-tcon * allwinner,sun8i-a33-tcon - reg: base address and size of memory-mapped region - interrupts: interrupt associated to this IP @@ -50,7 +52,7 @@ Required properties: second the block connected to the TCON channel 1 (usually the TV encoder) -On the A13, there is one more clock required: +On SoCs other than the A33, there is one more clock required: - 'tcon-ch1': The clock driving the TCON channel 1 DRC @@ -64,6 +66,8 @@ adaptive backlight control. Required properties: - compatible: value must be one of: + * allwinner,sun6i-a31-drc + * allwinner,sun6i-a31s-drc * allwinner,sun8i-a33-drc - reg: base address and size of the memory-mapped region. - interrupts: interrupt associated to this IP @@ -87,6 +91,7 @@ system. Required properties: - compatible: value must be one of: * allwinner,sun5i-a13-display-backend + * allwinner,sun6i-a31-display-backend * allwinner,sun8i-a33-display-backend - reg: base address and size of the memory-mapped region. - clocks: phandles to the clocks feeding the frontend and backend @@ -117,6 +122,7 @@ deinterlacing and color space conversion. Required properties: - compatible: value must be one of: * allwinner,sun5i-a13-display-frontend + * allwinner,sun6i-a31-display-frontend * allwinner,sun8i-a33-display-frontend - reg: base address and size of the memory-mapped region. - interrupts: interrupt associated to this IP @@ -142,6 +148,8 @@ extra node. Required properties: - compatible: value must be one of: * allwinner,sun5i-a13-display-engine + * allwinner,sun6i-a31-display-engine + * allwinner,sun6i-a31s-display-engine * allwinner,sun8i-a33-display-engine - allwinner,pipelines: list of phandle to the display engine |