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authorPeter Griffin <peter.griffin@linaro.org>2014-06-16 12:06:36 +0100
committerUlf Hansson <ulf.hansson@linaro.org>2014-07-09 11:26:08 +0200
commit87a0f46a0e1c048ecf964e0ef020cca3d6daba2f (patch)
tree9a082d9b207fe755f525192ec4de942fdad8a93f /Documentation
parent5c87456b07ba278021e7dd66a32e9b4bc1acaa32 (diff)
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mmc: core: Fix DT documentation of eMMC high-speed DDR 1.8/1.2V bindings
Currently the documentation doesn't match the code in mmc_of_parse. This patch rectifies this. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/mmc/mmc.txt4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/mmc/mmc.txt b/Documentation/devicetree/bindings/mmc/mmc.txt
index 3c18001dfd5d..431716e37a39 100644
--- a/Documentation/devicetree/bindings/mmc/mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/mmc.txt
@@ -34,8 +34,8 @@ Optional properties:
- cap-power-off-card: powering off the card is safe
- cap-sdio-irq: enable SDIO IRQ signalling on this interface
- full-pwr-cycle: full power cycle of the card is supported
-- mmc-highspeed-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported
-- mmc-highspeed-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported
+- mmc-ddr-1_8v: eMMC high-speed DDR mode(1.8V I/O) is supported
+- mmc-ddr-1_2v: eMMC high-speed DDR mode(1.2V I/O) is supported
- mmc-hs200-1_8v: eMMC HS200 mode(1.8V I/O) is supported
- mmc-hs200-1_2v: eMMC HS200 mode(1.2V I/O) is supported
- mmc-hs400-1_8v: eMMC HS400 mode(1.8V I/O) is supported