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author | Purna Chandra Mandal <purna.mandal@microchip.com> | 2016-05-17 10:35:58 +0530 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2016-05-28 12:35:04 +0200 |
commit | 58c376893bfbf489ba0ad258ec72e067d643fe16 (patch) | |
tree | c9163aeb48bbd2e7ae87f1a91f8e9ebe3b3cf7c5 /Documentation | |
parent | 9c719d87e97b5b697e4425dfedd62230bda16c35 (diff) | |
download | linux-stable-58c376893bfbf489ba0ad258ec72e067d643fe16.tar.gz linux-stable-58c376893bfbf489ba0ad258ec72e067d643fe16.tar.bz2 linux-stable-58c376893bfbf489ba0ad258ec72e067d643fe16.zip |
dt/bindings: Correct clk binding example for PIC32 DMT.
Update binding example based on new clock binding scheme.
[1] Documentation/devicetree/bindings/clock/microchip,pic32.txt
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Joshua Henderson <digitalpeer@digitalpeer.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13268/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt b/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt index 852f694f3177..49485f831373 100644 --- a/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt +++ b/Documentation/devicetree/bindings/watchdog/microchip,pic32-dmt.txt @@ -8,12 +8,12 @@ Required properties: - compatible: must be "microchip,pic32mzda-dmt". - reg: physical base address of the controller and length of memory mapped region. -- clocks: phandle of parent clock (should be &PBCLK7). +- clocks: phandle of source clk. Should be <&rootclk PB7CLK>. Example: watchdog@1f800a00 { compatible = "microchip,pic32mzda-dmt"; reg = <0x1f800a00 0x80>; - clocks = <&PBCLK7>; + clocks = <&rootclk PB7CLK>; }; |