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author | Amit Nischal <anischal@codeaurora.org> | 2018-07-23 16:56:32 +0530 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2018-08-30 18:26:45 -0700 |
commit | f40c467523cb5dd352e669a8bab2411b31db089e (patch) | |
tree | 8070104a5648a24a998648fe7fca67a9432ccc31 /Documentation | |
parent | 5b394b2ddf0347bef56e50c69a58773c94343ff3 (diff) | |
download | linux-stable-f40c467523cb5dd352e669a8bab2411b31db089e.tar.gz linux-stable-f40c467523cb5dd352e669a8bab2411b31db089e.tar.bz2 linux-stable-f40c467523cb5dd352e669a8bab2411b31db089e.zip |
dt-bindings: clock: Introduce QCOM Camera clock bindings
Add device tree bindings for camera clock controller for
Qualcomm Technology Inc's SDM845 SoCs.
Signed-off-by: Amit Nischal <anischal@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/clock/qcom,camcc.txt | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/qcom,camcc.txt b/Documentation/devicetree/bindings/clock/qcom,camcc.txt new file mode 100644 index 000000000000..c5eb6694fda9 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,camcc.txt @@ -0,0 +1,18 @@ +Qualcomm Camera Clock & Reset Controller Binding +------------------------------------------------ + +Required properties : +- compatible : shall contain "qcom,sdm845-camcc". +- reg : shall contain base register location and length. +- #clock-cells : from common clock binding, shall contain 1. +- #reset-cells : from common reset binding, shall contain 1. +- #power-domain-cells : from generic power domain binding, shall contain 1. + +Example: + camcc: clock-controller@ad00000 { + compatible = "qcom,sdm845-camcc"; + reg = <0xad00000 0x10000>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; |