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authorGerald Baeza <gerald.baeza@st.com>2018-02-23 14:36:03 +0100
committerThierry Reding <thierry.reding@gmail.com>2018-03-28 00:53:23 +0200
commite7c4b02c2642a5ff3704bd86ff23a6a7a0f4e279 (patch)
treecdd876cead30fb4feda20c4fa3739aaa06c015fe /Documentation
parent4eb67a209645a87b8aca070aa9735eed90177829 (diff)
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dt-bindings: pwm-stm32-lp: Add #pwm-cells
STM32 Low-Power Timer supports generic 3 cells PWM to encode PWM number, period and polarity. Signed-off-by: Gerald Baeza <gerald.baeza@st.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt b/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt
index f8338d11fd2b..bd23302e84be 100644
--- a/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt
+++ b/Documentation/devicetree/bindings/pwm/pwm-stm32-lp.txt
@@ -7,6 +7,8 @@ See ../mfd/stm32-lptimer.txt for details about the parent node.
Required parameters:
- compatible: Must be "st,stm32-pwm-lp".
+- #pwm-cells: Should be set to 3. This PWM chip uses the default 3 cells
+ bindings defined in pwm.txt.
Optional properties:
- pinctrl-names: Set to "default".
@@ -18,6 +20,7 @@ Example:
...
pwm {
compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
pinctrl-names = "default";
pinctrl-0 = <&lppwm1_pins>;
};