diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2023-08-24 11:48:09 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-09-11 13:23:52 -0700 |
| commit | 1aa2a9f27627447da247997c34c71af9402fa237 (patch) | |
| tree | 9585aeae7154ad114e70e04a1e18815a519eba11 /Documentation | |
| parent | 0bb80ecc33a8fb5a682236443c1e740d5c917d1d (diff) | |
| download | linux-stable-1aa2a9f27627447da247997c34c71af9402fa237.tar.gz linux-stable-1aa2a9f27627447da247997c34c71af9402fa237.tar.bz2 linux-stable-1aa2a9f27627447da247997c34c71af9402fa237.zip | |
dt-bindings: clock: versaclock3: Add description for #clock-cells property
Add description for "#clock-cells" property to map indexes to the clock
output in the Table 3. ("Output Source") in the 5P35023 datasheet
(ie: {REF,SE1,SE2,SE3,DIFF1,DIFF2}. Also update the "assigned-clock-rates"
in the example.
While at it, replace clocks phandle in the example from x1_x2->x1 as
X2 is a different 32768 kHz crystal.
Suggested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230824104812.147775-2-biju.das.jz@bp.renesas.com
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,5p35023.yaml | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml b/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml index 839648e753d4..42b6f80613f3 100644 --- a/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,5p35023.yaml @@ -37,6 +37,9 @@ properties: maxItems: 1 '#clock-cells': + description: + The index in the assigned-clocks is mapped to the output clock as below + 0 - REF, 1 - SE1, 2 - SE2, 3 - SE3, 4 - DIFF1, 5 - DIFF2. const: 1 clocks: @@ -68,7 +71,7 @@ examples: reg = <0x68>; #clock-cells = <1>; - clocks = <&x1_x2>; + clocks = <&x1>; renesas,settings = [ 80 00 11 19 4c 02 23 7f 83 19 08 a9 5f 25 24 bf @@ -79,8 +82,8 @@ examples: assigned-clocks = <&versa3 0>, <&versa3 1>, <&versa3 2>, <&versa3 3>, <&versa3 4>, <&versa3 5>; - assigned-clock-rates = <12288000>, <25000000>, - <12000000>, <11289600>, - <11289600>, <24000000>; + assigned-clock-rates = <24000000>, <11289600>, + <11289600>, <12000000>, + <25000000>, <12288000>; }; }; |