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author | Konrad Dybcio <konrad.dybcio@linaro.org> | 2023-11-29 15:44:01 +0100 |
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committer | Bjorn Andersson <andersson@kernel.org> | 2023-12-07 08:57:50 -0800 |
commit | 56fdc35ef067c8dffee22038dd3a84bb3fa6d2a4 (patch) | |
tree | 93a3e157478714315fccff9ea5c3c303ac4395bc /Documentation | |
parent | 696945e427e63ebbabad656893fb82da1ee2a980 (diff) | |
download | linux-stable-56fdc35ef067c8dffee22038dd3a84bb3fa6d2a4.tar.gz linux-stable-56fdc35ef067c8dffee22038dd3a84bb3fa6d2a4.tar.bz2 linux-stable-56fdc35ef067c8dffee22038dd3a84bb3fa6d2a4.zip |
dt-bindings: firmware: qcom,scm: Allow interconnect for everyone
Every Qualcomm SoC physically has a "CRYPTO0<->DDR" interconnect lane.
Allow this property to be present, no matter the SoC.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231125-topic-rb1_feat-v3-4-4cbb567743bb@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'Documentation')
-rw-r--r-- | Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml index c1e504cf3500..47d3d2d52acd 100644 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml @@ -180,23 +180,6 @@ allOf: minItems: 3 maxItems: 3 - # Interconnects - - if: - not: - properties: - compatible: - contains: - enum: - - qcom,scm-qdu1000 - - qcom,scm-sc8280xp - - qcom,scm-sm8450 - - qcom,scm-sm8550 - - qcom,scm-sm8650 - - qcom,scm-x1e80100 - then: - properties: - interconnects: false - # Interrupts - if: not: |