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| author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2018-11-23 20:53:06 +0100 |
|---|---|---|
| committer | Kevin Hilman <khilman@baylibre.com> | 2018-12-10 12:43:40 -0800 |
| commit | e9e863dc1dc88212b09d279a143027e1521b35d1 (patch) | |
| tree | 4f64b5671d958269c7c8336eab7a03e886a341f8 /MAINTAINERS | |
| parent | 05d9fcbcf402fa4dd219ffeeb341d1b48d75404c (diff) | |
| download | linux-stable-e9e863dc1dc88212b09d279a143027e1521b35d1.tar.gz linux-stable-e9e863dc1dc88212b09d279a143027e1521b35d1.tar.bz2 linux-stable-e9e863dc1dc88212b09d279a143027e1521b35d1.zip | |
ARM: meson: select HAVE_ARM_TWD and ARM_GLOBAL_TIMER
The 32-bit Meson SoCs use multiple Cortex-A9 (Meson8 and Meson8m2) or
Cortex-A5 (Meson8b) CPU cores. These come with the "ARM global timer"
and "Timer-Watchdog" (aka TWD, which provides both a per-cpu local timer
and watchdog).
Selecting ARM_GLOBAL_TIMER and HAVE_ARM_TWD allows us to add the timers
to the SoC.dtsi files.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions