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| author | Vineet Gupta <vgupta@synopsys.com> | 2013-05-14 13:28:17 +0530 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2013-06-22 13:46:42 +0530 |
| commit | da1677b02d3ef674dfd8a4ba1ed32153dc717fa2 (patch) | |
| tree | 109d07ee350a94a85f9447af3f488623f989b6fa /arch/arc/mm/tlb.c | |
| parent | 18437347b976b81e616a57fb36922a240e71a6de (diff) | |
| download | linux-stable-da1677b02d3ef674dfd8a4ba1ed32153dc717fa2.tar.gz linux-stable-da1677b02d3ef674dfd8a4ba1ed32153dc717fa2.tar.bz2 linux-stable-da1677b02d3ef674dfd8a4ba1ed32153dc717fa2.zip | |
ARC: Disintegrate arcregs.h
* Move the various sub-system defines/types into relevant files/functions
(reduces compilation time)
* move CPU specific stuff out of asm/tlb.h into asm/mmu.h
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/mm/tlb.c')
| -rw-r--r-- | arch/arc/mm/tlb.c | 24 |
1 files changed, 20 insertions, 4 deletions
diff --git a/arch/arc/mm/tlb.c b/arch/arc/mm/tlb.c index 1ced5f18e6b3..f60807c2683d 100644 --- a/arch/arc/mm/tlb.c +++ b/arch/arc/mm/tlb.c @@ -55,7 +55,7 @@ #include <asm/arcregs.h> #include <asm/setup.h> #include <asm/mmu_context.h> -#include <asm/tlb.h> +#include <asm/mmu.h> /* Need for ARC MMU v2 * @@ -97,6 +97,7 @@ * J-TLB entry got evicted/replaced. */ + /* A copy of the ASID from the PID reg is kept in asid_cache */ int asid_cache = FIRST_ASID; @@ -466,10 +467,25 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr_unaligned, */ void __cpuinit read_decode_mmu_bcr(void) { - unsigned int tmp; - struct bcr_mmu_1_2 *mmu2; /* encoded MMU2 attr */ - struct bcr_mmu_3 *mmu3; /* encoded MMU3 attr */ struct cpuinfo_arc_mmu *mmu = &cpuinfo_arc700[smp_processor_id()].mmu; + unsigned int tmp; + struct bcr_mmu_1_2 { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int ver:8, ways:4, sets:4, u_itlb:8, u_dtlb:8; +#else + unsigned int u_dtlb:8, u_itlb:8, sets:4, ways:4, ver:8; +#endif + } *mmu2; + + struct bcr_mmu_3 { +#ifdef CONFIG_CPU_BIG_ENDIAN + unsigned int ver:8, ways:4, sets:4, osm:1, reserv:3, pg_sz:4, + u_itlb:4, u_dtlb:4; +#else + unsigned int u_dtlb:4, u_itlb:4, pg_sz:4, reserv:3, osm:1, sets:4, + ways:4, ver:8; +#endif + } *mmu3; tmp = read_aux_reg(ARC_REG_MMU_BCR); mmu->ver = (tmp >> 24); |