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| author | Tudor Ambarus <tudor.ambarus@microchip.com> | 2020-05-14 05:03:07 +0000 |
|---|---|---|
| committer | Alexandre Belloni <alexandre.belloni@bootlin.com> | 2020-05-15 16:49:45 +0200 |
| commit | 91fa03c9e33e3ae8eb6959dc3d0f0b853a004f2c (patch) | |
| tree | 23555164e63b3b5778dedc28d4967619c7ab84d9 /arch/arm/boot/dts/sama5d2.dtsi | |
| parent | f1f2212eaddf4857728167ce9e582e530183cf4b (diff) | |
| download | linux-stable-91fa03c9e33e3ae8eb6959dc3d0f0b853a004f2c.tar.gz linux-stable-91fa03c9e33e3ae8eb6959dc3d0f0b853a004f2c.tar.bz2 linux-stable-91fa03c9e33e3ae8eb6959dc3d0f0b853a004f2c.zip | |
ARM: dts: at91: sama5d2: Move flx4 definitions in the SoC dtsi
The Flexcom IP is part of the sama5d2 SoC. Move the flx0 node together
with its function definitions in sama5d2.dtsi. Boards will just fill
the pins and enable the desired functions.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20200514050301.147442-3-tudor.ambarus@microchip.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Diffstat (limited to 'arch/arm/boot/dts/sama5d2.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sama5d2.dtsi | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sama5d2.dtsi b/arch/arm/boot/dts/sama5d2.dtsi index ab550d69db91..5c31e4068eb5 100644 --- a/arch/arm/boot/dts/sama5d2.dtsi +++ b/arch/arm/boot/dts/sama5d2.dtsi @@ -814,6 +814,46 @@ #size-cells = <1>; ranges = <0x0 0xfc018000 0x800>; status = "disabled"; + + uart9: serial@200 { + compatible = "atmel,at91sam9260-usart"; + reg = <0x200 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + clock-names = "usart"; + atmel,fifo-size = <32>; + status = "disabled"; + }; + + spi6: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + clock-names = "spi_clk"; + atmel,fifo-size = <16>; + status = "disabled"; + }; + + i2c6: i2c@600 { + compatible = "atmel,sama5d2-i2c"; + reg = <0x600 0x200>; + interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>; + #address-cells = <1>; + #size-cells = <0>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 23>; + dmas = <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(19))>, + <&dma0 + (AT91_XDMAC_DT_MEM_IF(0) | + AT91_XDMAC_DT_PER_IF(1) | + AT91_XDMAC_DT_PERID(20))>; + dma-names = "tx", "rx"; + atmel,fifo-size = <16>; + status = "disabled"; + }; }; trng@fc01c000 { |