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| author | Chen-Yu Tsai <wens@csie.org> | 2016-10-20 11:43:43 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2016-11-22 15:32:07 +0100 |
| commit | 0ff8219fa6dac17a6887b88599873b83ce51a5f2 (patch) | |
| tree | afcb942d9c6ea6de202b5b172b044988ea49e73e /arch/arm/boot/dts/sun6i-a31.dtsi | |
| parent | 6d0e5b70be13e703974b4fa03e833d5f39519ea9 (diff) | |
| download | linux-stable-0ff8219fa6dac17a6887b88599873b83ce51a5f2.tar.gz linux-stable-0ff8219fa6dac17a6887b88599873b83ce51a5f2.tar.bz2 linux-stable-0ff8219fa6dac17a6887b88599873b83ce51a5f2.zip | |
ARM: dts: sun6i: Add A31 LCD0 RGB888 pins
The LCD0 controller on the A31 can do RGB output up to 8 bits per
channel. Add the pins for RGB888 output.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'arch/arm/boot/dts/sun6i-a31.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sun6i-a31.dtsi | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi index 4d2c7786b92a..2e8bf93dcfb2 100644 --- a/arch/arm/boot/dts/sun6i-a31.dtsi +++ b/arch/arm/boot/dts/sun6i-a31.dtsi @@ -540,6 +540,19 @@ allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; }; + lcd0_rgb888_pins: lcd0_rgb888 { + allwinner,pins = "PD0", "PD1", "PD2", "PD3", + "PD4", "PD5", "PD6", "PD7", + "PD8", "PD9", "PD10", "PD11", + "PD12", "PD13", "PD14", "PD15", + "PD16", "PD17", "PD18", "PD19", + "PD20", "PD21", "PD22", "PD23", + "PD24", "PD25", "PD26", "PD27"; + allwinner,function = "lcd0"; + allwinner,drive = <SUN4I_PINCTRL_10_MA>; + allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; + }; + mmc0_pins_a: mmc0@0 { allwinner,pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; |