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| author | Andrew Lunn <andrew@lunn.ch> | 2012-06-27 13:40:04 +0200 |
|---|---|---|
| committer | Andrew Lunn <andrew@lunn.ch> | 2012-07-27 16:48:14 +0200 |
| commit | 278b45b06bf721b7cf5de67a0126786c60c720e6 (patch) | |
| tree | 4e2a3af2527110f9328aebca560cf6c1cef32c1c /arch/arm/mach-mv78xx0 | |
| parent | 89fb2d77d5daa821e3868ea59963f28249974840 (diff) | |
| download | linux-stable-278b45b06bf721b7cf5de67a0126786c60c720e6.tar.gz linux-stable-278b45b06bf721b7cf5de67a0126786c60c720e6.tar.bz2 linux-stable-278b45b06bf721b7cf5de67a0126786c60c720e6.zip | |
ARM: Orion: DT support for IRQ and GPIO Controllers
Both IRQ and GPIO controllers can now be represented in DT. The IRQ
controllers are setup first, and then the GPIO controllers. Interrupts
for GPIO lines are placed directly after the main interrupts in the
interrupt space.
Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@googlemail.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Tested-by: Josh Coombs <josh.coombs@gmail.com>
Tested-by: Simon Baatz <gmbnomis@gmail.com>
Diffstat (limited to 'arch/arm/mach-mv78xx0')
| -rw-r--r-- | arch/arm/mach-mv78xx0/irq.c | 22 |
1 files changed, 8 insertions, 14 deletions
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c index e421b701663b..eff9a750bbe2 100644 --- a/arch/arm/mach-mv78xx0/irq.c +++ b/arch/arm/mach-mv78xx0/irq.c @@ -9,19 +9,17 @@ */ #include <linux/gpio.h> #include <linux/kernel.h> -#include <linux/init.h> -#include <linux/pci.h> #include <linux/irq.h> #include <mach/bridge-regs.h> #include <plat/irq.h> #include "common.h" -static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc) -{ - BUG_ON(irq < IRQ_MV78XX0_GPIO_0_7 || irq > IRQ_MV78XX0_GPIO_24_31); - - orion_gpio_irq_handler((irq - IRQ_MV78XX0_GPIO_0_7) << 3); -} +static int __initdata gpio0_irqs[4] = { + IRQ_MV78XX0_GPIO_0_7, + IRQ_MV78XX0_GPIO_8_15, + IRQ_MV78XX0_GPIO_16_23, + IRQ_MV78XX0_GPIO_24_31, +}; void __init mv78xx0_init_irq(void) { @@ -34,11 +32,7 @@ void __init mv78xx0_init_irq(void) * registers for core #1 are at an offset of 0x18 from those of * core #0.) */ - orion_gpio_init(0, 32, GPIO_VIRT_BASE, + orion_gpio_init(NULL, 0, 32, (void __iomem *)GPIO_VIRT_BASE, mv78xx0_core_index() ? 0x18 : 0, - IRQ_MV78XX0_GPIO_START); - irq_set_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler); - irq_set_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler); - irq_set_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler); - irq_set_chained_handler(IRQ_MV78XX0_GPIO_24_31, gpio_irq_handler); + IRQ_MV78XX0_GPIO_START, gpio0_irqs); } |