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author | Benoit Cousson <b-cousson@ti.com> | 2011-02-08 14:30:31 -0700 |
---|---|---|
committer | Paul Walmsley <paul@pwsan.com> | 2011-03-01 16:36:20 -0700 |
commit | 1a9f5e89d67855385ed42b7b71167e2d3a39507a (patch) | |
tree | b4f0e175557d178beea8b8a10ca2f8469ca668e0 /arch/arm/mach-omap2/clockdomains44xx_data.c | |
parent | dd9c1549edef02290edced639f67b54a25abbe0e (diff) | |
download | linux-stable-1a9f5e89d67855385ed42b7b71167e2d3a39507a.tar.gz linux-stable-1a9f5e89d67855385ed42b7b71167e2d3a39507a.tar.bz2 linux-stable-1a9f5e89d67855385ed42b7b71167e2d3a39507a.zip |
omap4: clockdomain: Fix the CPUx domain name
The register naming convention for clock domain control inside
power domain instance is:
OMAPXXXX_<partition>_<power_domain>_<clock_domain>_CDOFFS
Both CPU0 and CPU1 use MPU as clock domain name instead of CPU0
and CPU1.
Change the name to stick to the convention.
The autogen scripts are updated accordingly.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/clockdomains44xx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/clockdomains44xx_data.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c index 10622c914abc..3d1c06b1676c 100644 --- a/arch/arm/mach-omap2/clockdomains44xx_data.c +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c @@ -150,7 +150,7 @@ static struct clockdomain mpu0_44xx_clkdm = { .pwrdm = { .name = "cpu0_pwrdm" }, .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, .cm_inst = OMAP4430_PRCM_MPU_CPU0_INST, - .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_MPU_CDOFFS, + .clkdm_offs = OMAP4430_PRCM_MPU_CPU0_CPU0_CDOFFS, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; @@ -160,7 +160,7 @@ static struct clockdomain mpu1_44xx_clkdm = { .pwrdm = { .name = "cpu1_pwrdm" }, .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, .cm_inst = OMAP4430_PRCM_MPU_CPU1_INST, - .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_MPU_CDOFFS, + .clkdm_offs = OMAP4430_PRCM_MPU_CPU1_CPU1_CDOFFS, .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), }; |