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author | Paul Walmsley <paul@pwsan.com> | 2010-12-21 21:05:15 -0700 |
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committer | Paul Walmsley <paul@pwsan.com> | 2010-12-21 21:05:15 -0700 |
commit | 55ae35073b1c76f24c3736cf797c40d9932b19aa (patch) | |
tree | 0309763ffbd016bb884ca916b35a15d10f1982a5 /arch/arm/mach-omap2/cm2xxx_3xxx.c | |
parent | bd2122ca358fbd5c8e94869ae731a0951b36c757 (diff) | |
download | linux-stable-55ae35073b1c76f24c3736cf797c40d9932b19aa.tar.gz linux-stable-55ae35073b1c76f24c3736cf797c40d9932b19aa.tar.bz2 linux-stable-55ae35073b1c76f24c3736cf797c40d9932b19aa.zip |
OMAP2/3: clockdomain: remove unneeded .clkstctrl_reg, remove some direct CM register accesses
Reverse some of the effects of commit
84c0c39aec31a09571fc08a752a2f4da0fe9fcf2 ("ARM: OMAP4: PM: Make OMAP3
Clock-domain framework compatible for OMAP4"). On OMAP2/3, the
CM_CLKSTCTRL register is at a constant offset from the powerdomain's
CM instance.
Also, remove some of the direct CM register access from the
clockdomain code, moving it to the OMAP2/3 CM code instead. The
intention here is to simplify the clockdomain code. (The long-term
goal is to move all direct CM register access across the OMAP core
code to the appropriate cm*.c file.)
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Tested-by: Rajendra Nayak <rnayak@ti.com>
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/cm2xxx_3xxx.c')
-rw-r--r-- | arch/arm/mach-omap2/cm2xxx_3xxx.c | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cm2xxx_3xxx.c b/arch/arm/mach-omap2/cm2xxx_3xxx.c index e3d598a4c624..96954aa48671 100644 --- a/arch/arm/mach-omap2/cm2xxx_3xxx.c +++ b/arch/arm/mach-omap2/cm2xxx_3xxx.c @@ -62,6 +62,74 @@ u32 omap2_cm_clear_mod_reg_bits(u32 bits, s16 module, s16 idx) return omap2_cm_rmw_mod_reg_bits(bits, 0x0, module, idx); } +/* + * + */ + +static void _write_clktrctrl(u8 c, s16 module, u32 mask) +{ + u32 v; + + v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); + v &= ~mask; + v |= c << __ffs(mask); + omap2_cm_write_mod_reg(v, module, OMAP2_CM_CLKSTCTRL); +} + +bool omap2_cm_is_clkdm_in_hwsup(s16 module, u32 mask) +{ + u32 v; + bool ret = 0; + + BUG_ON(!cpu_is_omap24xx() && !cpu_is_omap34xx()); + + v = omap2_cm_read_mod_reg(module, OMAP2_CM_CLKSTCTRL); + v &= mask; + v >>= __ffs(mask); + + if (cpu_is_omap24xx()) + ret = (v == OMAP24XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; + else + ret = (v == OMAP34XX_CLKSTCTRL_ENABLE_AUTO) ? 1 : 0; + + return ret; +} + +void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) +{ + _write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask); +} + +void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask) +{ + _write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask); +} + +void omap3xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) +{ + _write_clktrctrl(OMAP34XX_CLKSTCTRL_ENABLE_AUTO, module, mask); +} + +void omap3xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask) +{ + _write_clktrctrl(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, module, mask); +} + +void omap3xxx_cm_clkdm_force_sleep(s16 module, u32 mask) +{ + _write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, module, mask); +} + +void omap3xxx_cm_clkdm_force_wakeup(s16 module, u32 mask) +{ + _write_clktrctrl(OMAP34XX_CLKSTCTRL_FORCE_WAKEUP, module, mask); +} + + +/* + * + */ + /** * omap2_cm_wait_idlest_ready - wait for a module to leave idle or standby * @prcm_mod: PRCM module offset |