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authorVaibhav Bedia <vaibhav.bedia@ti.com>2013-01-29 16:45:04 +0530
committerPaul Walmsley <paul@pwsan.com>2013-02-08 07:25:04 -0700
commitf13966608f9f65dd635eb400cc93f856a595531a (patch)
treea8adfa4dd7d4dcfe74e898e2e6315c31eda412fd /arch/arm/mach-omap2/omap_hwmod_33xx_data.c
parent0bfbbded8dbd82ec252be2ea0a9e221a1b22e8ba (diff)
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ARM: OMAP2+: AM33XX: hwmod: Fixup cpgmac0 hwmod entry
The current HWMOD code expects the memory region with the IP's SYSCONFIG register to be marked with ADDR_TYPE_RT flag. CPGMAC0 hwmod entry specifies two memory regions and marks both with the flag ADDR_TYPE_RT although only the 2nd region has the SYSCONFIG register. This leads to the HWMOD code accessing the wrong memory address for idle and standby operations. Fix this by removing the ADDR_TYPE_RT flag from the 1st memory region in CPGMAC0 hwmod entry. Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_33xx_data.c')
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_33xx_data.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
index 94254e84527f..40bfde3fe3f8 100644
--- a/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_33xx_data.c
@@ -2496,7 +2496,6 @@ static struct omap_hwmod_addr_space am33xx_cpgmac0_addr_space[] = {
{
.pa_start = 0x4a100000,
.pa_end = 0x4a100000 + SZ_2K - 1,
- .flags = ADDR_TYPE_RT,
},
/* cpsw wr */
{