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author | Paul Walmsley <paul@pwsan.com> | 2010-12-21 21:05:16 -0700 |
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committer | Paul Walmsley <paul@pwsan.com> | 2010-12-21 21:05:16 -0700 |
commit | 72e06d087204f3bc9acf281717b90ebf0b9731f7 (patch) | |
tree | 358524d58e5fdb906507ffc9549758c14fce9fbe /arch/arm/mach-omap2/pm34xx.c | |
parent | 1540f214065982e6cbc6b8da1fe65a15e358f7c5 (diff) | |
download | linux-stable-72e06d087204f3bc9acf281717b90ebf0b9731f7.tar.gz linux-stable-72e06d087204f3bc9acf281717b90ebf0b9731f7.tar.bz2 linux-stable-72e06d087204f3bc9acf281717b90ebf0b9731f7.zip |
OMAP2+: powerdomain: move header file from plat-omap to mach-omap2
The OMAP powerdomain code and data is all OMAP2+-specific. This seems
unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h
to mach-omap2/powerdomain.h. The primary point of doing this is to remove
the temptation for unrelated upper-layer code to access powerdomain code
and data directly.
As part of this process, remove the references to powerdomain data
from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap.
Change the DSPBridge code to point to the new location for the
powerdomain headers. The DSPBridge code should not be including the
powerdomain headers; these should be removed.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@deeprootsystems.com>
Cc: Omar Ramirez Luna <omar.ramirez@ti.com>
Cc: Felipe Contreras <felipe.contreras@gmail.com>
Cc: Greg Kroah-Hartman <greg@kroah.com>
Diffstat (limited to 'arch/arm/mach-omap2/pm34xx.c')
-rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 0fae3d6b76e8..5efd1fb8c640 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -32,7 +32,7 @@ #include <plat/sram.h> #include "clockdomain.h" -#include <plat/powerdomain.h> +#include "powerdomain.h" #include <plat/serial.h> #include <plat/sdrc.h> #include <plat/prcm.h> @@ -360,6 +360,7 @@ void omap_sram_idle(void) int mpu_next_state = PWRDM_POWER_ON; int per_next_state = PWRDM_POWER_ON; int core_next_state = PWRDM_POWER_ON; + int per_going_off; int core_prev_state, per_prev_state; u32 sdrc_pwr = 0; @@ -411,9 +412,10 @@ void omap_sram_idle(void) /* PER */ if (per_next_state < PWRDM_POWER_ON) { + per_going_off = (per_next_state == PWRDM_POWER_OFF) ? 1 : 0; omap_uart_prepare_idle(2); omap_uart_prepare_idle(3); - omap2_gpio_prepare_for_idle(per_next_state); + omap2_gpio_prepare_for_idle(per_going_off); if (per_next_state == PWRDM_POWER_OFF) omap3_per_save_context(); } |