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author | Kevin Hilman <khilman@ti.com> | 2011-06-09 11:01:55 -0700 |
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committer | Kevin Hilman <khilman@ti.com> | 2011-09-15 12:02:56 -0700 |
commit | e4e021c5491537783f5f65a6defa92e6098a3658 (patch) | |
tree | 01f6736da2d7584f6740401b6f297d80f8565dc6 /arch/arm/mach-omap2/vc44xx_data.c | |
parent | ba112a4e86ba8f0f9546bd953374cde064b507ca (diff) | |
download | linux-stable-e4e021c5491537783f5f65a6defa92e6098a3658.tar.gz linux-stable-e4e021c5491537783f5f65a6defa92e6098a3658.tar.bz2 linux-stable-e4e021c5491537783f5f65a6defa92e6098a3658.zip |
OMAP3+: VC: cleanup PMIC register address configuration
- support both voltage register address and command register address
for each VC channel
- add fields for voltage register address (volra) and command register
address (cmdra) to struct omap_vc_channel
- use VC/VP register access read/modify/write helper
- remove volra_shift field (use __ffs(mask) for shift value)
- I2C addresses 10-bit, change size to u16
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/vc44xx_data.c')
-rw-r--r-- | arch/arm/mach-omap2/vc44xx_data.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c index af922b440e96..5d104ff662b3 100644 --- a/arch/arm/mach-omap2/vc44xx_data.c +++ b/arch/arm/mach-omap2/vc44xx_data.c @@ -33,6 +33,7 @@ static const struct omap_vc_common omap4_vc_common = { .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, + .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, .data_shift = OMAP4430_DATA_SHIFT, .slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT, @@ -50,23 +51,23 @@ struct omap_vc_channel omap4_vc_mpu = { .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, - .smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT, .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, + .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, }; struct omap_vc_channel omap4_vc_iva = { .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, - .smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT, .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, + .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, }; struct omap_vc_channel omap4_vc_core = { .common = &omap4_vc_common, .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, - .smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT, .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, + .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, }; |