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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-11-17 11:30:21 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2020-11-23 09:54:00 +0100 |
| commit | a0a6624dbec851ab5c136efbecd87a49617a5cc9 (patch) | |
| tree | 623f1df720e62de570ad555ce49ed5a6b6020729 /arch/arm/mach-shmobile | |
| parent | cc85e21d6d18ffea52eef061f987978153c2aa0a (diff) | |
| download | linux-stable-a0a6624dbec851ab5c136efbecd87a49617a5cc9.tar.gz linux-stable-a0a6624dbec851ab5c136efbecd87a49617a5cc9.tar.bz2 linux-stable-a0a6624dbec851ab5c136efbecd87a49617a5cc9.zip | |
ARM: shmobile: sh73a0: Use ioremap() to map SMP registers
Replace using the legacy IOMEM() macro to map various registers related
to secondary CPU bringup by ioremap().
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20201117103022.2136527-7-geert+renesas@glider.be
Diffstat (limited to 'arch/arm/mach-shmobile')
| -rw-r--r-- | arch/arm/mach-shmobile/smp-sh73a0.c | 33 |
1 files changed, 22 insertions, 11 deletions
diff --git a/arch/arm/mach-shmobile/smp-sh73a0.c b/arch/arm/mach-shmobile/smp-sh73a0.c index 0403aa8629dd..6d892d11d81c 100644 --- a/arch/arm/mach-shmobile/smp-sh73a0.c +++ b/arch/arm/mach-shmobile/smp-sh73a0.c @@ -16,31 +16,42 @@ #include "common.h" #include "sh73a0.h" -#define WUPCR IOMEM(0xe6151010) -#define SRESCR IOMEM(0xe6151018) -#define PSTR IOMEM(0xe6151040) -#define SBAR IOMEM(0xe6180020) -#define APARMBAREA IOMEM(0xe6f10020) +#define CPG_BASE2 0xe6151000 +#define WUPCR 0x10 /* System-CPU Wake Up Control Register */ +#define SRESCR 0x18 /* System-CPU Software Reset Control Register */ +#define PSTR 0x40 /* System-CPU Power Status Register */ + +#define SYSC_BASE 0xe6180000 +#define SBAR 0x20 /* SYS Boot Address Register */ + +#define AP_BASE 0xe6f10000 +#define APARMBAREA 0x20 /* Address Translation Area Register */ #define SH73A0_SCU_BASE 0xf0000000 static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle) { unsigned int lcpu = cpu_logical_map(cpu); + void __iomem *cpg2 = ioremap(CPG_BASE2, PAGE_SIZE); - if (((__raw_readl(PSTR) >> (4 * lcpu)) & 3) == 3) - __raw_writel(1 << lcpu, WUPCR); /* wake up */ + if (((__raw_readl(cpg2 + PSTR) >> (4 * lcpu)) & 3) == 3) + __raw_writel(1 << lcpu, cpg2 + WUPCR); /* wake up */ else - __raw_writel(1 << lcpu, SRESCR); /* reset */ - + __raw_writel(1 << lcpu, cpg2 + SRESCR); /* reset */ + iounmap(cpg2); return 0; } static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus) { + void __iomem *ap = ioremap(AP_BASE, PAGE_SIZE); + void __iomem *sysc = ioremap(SYSC_BASE, PAGE_SIZE); + /* Map the reset vector (in headsmp.S) */ - __raw_writel(0, APARMBAREA); /* 4k */ - __raw_writel(__pa(shmobile_boot_vector), SBAR); + __raw_writel(0, ap + APARMBAREA); /* 4k */ + __raw_writel(__pa(shmobile_boot_vector), sysc + SBAR); + iounmap(sysc); + iounmap(ap); /* setup sh73a0 specific SCU bits */ shmobile_smp_scu_prepare_cpus(SH73A0_SCU_BASE, max_cpus); |