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author | Lennert Buytenhek <buytenh@wantstofly.org> | 2008-03-27 14:51:40 -0400 |
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committer | Nicolas Pitre <nico@marvell.com> | 2008-03-27 14:51:40 -0400 |
commit | 01eb569823792ab83b2810fcb31fa38560b08951 (patch) | |
tree | 8387d18b01b87d3d533b7f3f068c0c470af5fbd4 /arch/arm/plat-orion | |
parent | 69b02f6a9639af89c099d06d5f2c4c66a1b03ebf (diff) | |
download | linux-stable-01eb569823792ab83b2810fcb31fa38560b08951.tar.gz linux-stable-01eb569823792ab83b2810fcb31fa38560b08951.tar.bz2 linux-stable-01eb569823792ab83b2810fcb31fa38560b08951.zip |
plat-orion: share IRQ handling code
Split off Orion IRQ handling code into plat-orion/, and add
support for multiple sets of (32) interrupts.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Reviewed-by: Tzachi Perelstein <tzachi@marvell.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/plat-orion')
-rw-r--r-- | arch/arm/plat-orion/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/plat-orion/irq.c | 64 |
2 files changed, 65 insertions, 1 deletions
diff --git a/arch/arm/plat-orion/Makefile b/arch/arm/plat-orion/Makefile index 2327762133f7..ea4ce342a196 100644 --- a/arch/arm/plat-orion/Makefile +++ b/arch/arm/plat-orion/Makefile @@ -2,7 +2,7 @@ # Makefile for the linux kernel. # -obj-y := +obj-y := irq.o obj-m := obj-n := obj- := diff --git a/arch/arm/plat-orion/irq.c b/arch/arm/plat-orion/irq.c new file mode 100644 index 000000000000..c5b669d234bc --- /dev/null +++ b/arch/arm/plat-orion/irq.c @@ -0,0 +1,64 @@ +/* + * arch/arm/plat-orion/irq.c + * + * Marvell Orion SoC IRQ handling. + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#include <linux/kernel.h> +#include <linux/init.h> +#include <linux/irq.h> +#include <linux/io.h> +#include <asm/plat-orion/irq.h> + +static void orion_irq_mask(u32 irq) +{ + void __iomem *maskaddr = get_irq_chip_data(irq); + u32 mask; + + mask = readl(maskaddr); + mask &= ~(1 << (irq & 31)); + writel(mask, maskaddr); +} + +static void orion_irq_unmask(u32 irq) +{ + void __iomem *maskaddr = get_irq_chip_data(irq); + u32 mask; + + mask = readl(maskaddr); + mask |= 1 << (irq & 31); + writel(mask, maskaddr); +} + +static struct irq_chip orion_irq_chip = { + .name = "orion_irq", + .ack = orion_irq_mask, + .mask = orion_irq_mask, + .unmask = orion_irq_unmask, +}; + +void __init orion_irq_init(unsigned int irq_start, void __iomem *maskaddr) +{ + unsigned int i; + + /* + * Mask all interrupts initially. + */ + writel(0, maskaddr); + + /* + * Register IRQ sources. + */ + for (i = 0; i < 32; i++) { + unsigned int irq = irq_start + i; + + set_irq_chip(irq, &orion_irq_chip); + set_irq_chip_data(irq, maskaddr); + set_irq_handler(irq, handle_level_irq); + set_irq_flags(irq, IRQF_VALID); + } +} |