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author | Vladimir Barinov <vladimir.barinov@cogentembedded.com> | 2016-11-08 17:16:29 +0300 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2016-11-21 10:18:52 +0100 |
commit | 93373c309a703b57690216db4106a4a534929c15 (patch) | |
tree | 117f473d66ffdbb0aca37e6d5f99139230b7f532 /arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | |
parent | 274dc8916d4b4b2f6a2636e670771c806a7e6a96 (diff) | |
download | linux-stable-93373c309a703b57690216db4106a4a534929c15.tar.gz linux-stable-93373c309a703b57690216db4106a4a534929c15.tar.bz2 linux-stable-93373c309a703b57690216db4106a4a534929c15.zip |
arm64: dts: h3ulcb: rename SDHI0 pins
This changes SDHI0 pin names for H3ULCB board
Signed-off-by: Vladimir Barinov <vladimir.barinov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts')
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts index 8d0ac076d8e2..6ffb0517421a 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts +++ b/arch/arm64/boot/dts/renesas/r8a7795-h3ulcb.dts @@ -163,13 +163,13 @@ function = "avb"; }; - sdhi0_pins_3v3: sd0_3v3 { + sdhi0_pins: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; power-source = <3300>; }; - sdhi0_pins_1v8: sd0_1v8 { + sdhi0_pins_uhs: sd0 { groups = "sdhi0_data4", "sdhi0_ctrl"; function = "sdhi0"; power-source = <1800>; @@ -291,8 +291,8 @@ }; &sdhi0 { - pinctrl-0 = <&sdhi0_pins_3v3>; - pinctrl-1 = <&sdhi0_pins_1v8>; + pinctrl-0 = <&sdhi0_pins>; + pinctrl-1 = <&sdhi0_pins_uhs>; pinctrl-names = "default", "state_uhs"; vmmc-supply = <&vcc_sdhi0>; |