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authorMasahiro Yamada <yamada.masahiro@socionext.com>2017-08-27 21:03:06 +0900
committerMasahiro Yamada <yamada.masahiro@socionext.com>2017-08-28 23:57:24 +0900
commit3dfc6e982910c9fef4a924477b5f41a1257dd90f (patch)
tree0b42dfe73573daa5c028cbdd91c5876fb529ee00 /arch/arm64/boot/dts/socionext
parent178b356839a3a9ce4a4e8e5780883a18992a010e (diff)
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arm64: dts: uniphier: add AIDET nodes
Add UniPhier AIDET (ARM Interrupt Detector) nodes to support active low interrupts. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Diffstat (limited to 'arch/arm64/boot/dts/socionext')
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi7
-rw-r--r--arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi7
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
index 5537a457af97..ee4aff53a5f5 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi
@@ -355,6 +355,13 @@
};
};
+ aidet: aidet@5fc20000 {
+ compatible = "socionext,uniphier-ld11-aidet";
+ reg = <0x5fc20000 0x200>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
gic: interrupt-controller@5fe00000 {
compatible = "arm,gic-v3";
reg = <0x5fe00000 0x10000>, /* GICD */
diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
index 304cb743d70c..f4948d0aa348 100644
--- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
+++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi
@@ -376,6 +376,13 @@
};
};
+ aidet: aidet@5fc20000 {
+ compatible = "socionext,uniphier-ld20-aidet";
+ reg = <0x5fc20000 0x200>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
gic: interrupt-controller@5fe00000 {
compatible = "arm,gic-v3";
reg = <0x5fe00000 0x10000>, /* GICD */