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author | Marc Zyngier <marc.zyngier@arm.com> | 2018-02-06 17:56:20 +0000 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-02-06 22:54:17 +0000 |
commit | b092201e0020614127f495c092e0a12d26a2116e (patch) | |
tree | 687459c8073a8331c25f592552e926e886cceec3 /arch/arm64/kernel/bpi.S | |
parent | f2d3b2e8759a5833df6f022e42df2d581e6d843c (diff) | |
download | linux-stable-b092201e0020614127f495c092e0a12d26a2116e.tar.gz linux-stable-b092201e0020614127f495c092e0a12d26a2116e.tar.bz2 linux-stable-b092201e0020614127f495c092e0a12d26a2116e.zip |
arm64: Add ARM_SMCCC_ARCH_WORKAROUND_1 BP hardening support
Add the detection and runtime code for ARM_SMCCC_ARCH_WORKAROUND_1.
It is lovely. Really.
Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/bpi.S')
-rw-r--r-- | arch/arm64/kernel/bpi.S | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/kernel/bpi.S b/arch/arm64/kernel/bpi.S index 76225c2611ea..fdeed629f2c6 100644 --- a/arch/arm64/kernel/bpi.S +++ b/arch/arm64/kernel/bpi.S @@ -17,6 +17,7 @@ */ #include <linux/linkage.h> +#include <linux/arm-smccc.h> .macro ventry target .rept 31 @@ -85,3 +86,22 @@ ENTRY(__qcom_hyp_sanitize_link_stack_start) .endr ldp x29, x30, [sp], #16 ENTRY(__qcom_hyp_sanitize_link_stack_end) + +.macro smccc_workaround_1 inst + sub sp, sp, #(8 * 4) + stp x2, x3, [sp, #(8 * 0)] + stp x0, x1, [sp, #(8 * 2)] + mov w0, #ARM_SMCCC_ARCH_WORKAROUND_1 + \inst #0 + ldp x2, x3, [sp, #(8 * 0)] + ldp x0, x1, [sp, #(8 * 2)] + add sp, sp, #(8 * 4) +.endm + +ENTRY(__smccc_workaround_1_smc_start) + smccc_workaround_1 smc +ENTRY(__smccc_workaround_1_smc_end) + +ENTRY(__smccc_workaround_1_hvc_start) + smccc_workaround_1 hvc +ENTRY(__smccc_workaround_1_hvc_end) |