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| author | Will Deacon <will.deacon@arm.com> | 2018-02-02 17:31:39 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-02-06 22:53:44 +0000 |
| commit | 5dfc6ed27710c42cbc15db5c0d4475699991da0a (patch) | |
| tree | b2cb8fd601a5694ce4992354dc83c0fbd6e2f459 /arch/arm64/kernel/entry.S | |
| parent | 91b2d3442f6a44dce875670d702af22737ad5eff (diff) | |
| download | linux-stable-5dfc6ed27710c42cbc15db5c0d4475699991da0a.tar.gz linux-stable-5dfc6ed27710c42cbc15db5c0d4475699991da0a.tar.bz2 linux-stable-5dfc6ed27710c42cbc15db5c0d4475699991da0a.zip | |
arm64: entry: Apply BP hardening for high-priority synchronous exceptions
Software-step and PC alignment fault exceptions have higher priority than
instruction abort exceptions, so apply the BP hardening hooks there too
if the user PC appears to reside in kernel space.
Reported-by: Dan Hettena <dhettena@nvidia.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/entry.S')
| -rw-r--r-- | arch/arm64/kernel/entry.S | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S index 4dd1b5a46642..af22793103af 100644 --- a/arch/arm64/kernel/entry.S +++ b/arch/arm64/kernel/entry.S @@ -767,7 +767,10 @@ el0_sp_pc: * Stack or PC alignment exception handling */ mrs x26, far_el1 - enable_daif + enable_da_f +#ifdef CONFIG_TRACE_IRQFLAGS + bl trace_hardirqs_off +#endif ct_user_exit mov x0, x26 mov x1, x25 |