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| author | Mark Rutland <mark.rutland@arm.com> | 2017-01-19 17:57:43 +0000 |
|---|---|---|
| committer | Mark Rutland <mark.rutland@arm.com> | 2017-03-09 15:29:45 +0000 |
| commit | 0e9884fe63c68d7c9043410fd3ee009c1fc78985 (patch) | |
| tree | 0b26474f7d6496e0537e4f5b9b7540a727bfd6a3 /arch/arm64/kernel/head.S | |
| parent | c7a3c61fc60642b9b1462c6deb9fd531d30e333d (diff) | |
| download | linux-stable-0e9884fe63c68d7c9043410fd3ee009c1fc78985.tar.gz linux-stable-0e9884fe63c68d7c9043410fd3ee009c1fc78985.tar.bz2 linux-stable-0e9884fe63c68d7c9043410fd3ee009c1fc78985.zip | |
arm64: sysreg: subsume GICv3 sysreg definitions
Unlike most sysreg defintiions, the GICv3 definitions don't have a SYS_
prefix, and they don't live in <asm/sysreg.h>. Additionally, some
definitions are duplicated elsewhere (e.g. in the KVM save/restore
code).
For consistency, and to make it possible to share a common definition
for these sysregs, this patch moves the definitions to <asm/sysreg.h>,
adding a SYS_ prefix, and sorting the registers per their encoding.
Existing users of the definitions are fixed up so that this change is
not problematic.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/kernel/head.S')
| -rw-r--r-- | arch/arm64/kernel/head.S | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 4fb6ccd886d1..95ae40ac3f40 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -594,14 +594,14 @@ set_hcr: cmp x0, #1 b.ne 3f - mrs_s x0, ICC_SRE_EL2 + mrs_s x0, SYS_ICC_SRE_EL2 orr x0, x0, #ICC_SRE_EL2_SRE // Set ICC_SRE_EL2.SRE==1 orr x0, x0, #ICC_SRE_EL2_ENABLE // Set ICC_SRE_EL2.Enable==1 - msr_s ICC_SRE_EL2, x0 + msr_s SYS_ICC_SRE_EL2, x0 isb // Make sure SRE is now set - mrs_s x0, ICC_SRE_EL2 // Read SRE back, + mrs_s x0, SYS_ICC_SRE_EL2 // Read SRE back, tbz x0, #0, 3f // and check that it sticks - msr_s ICH_HCR_EL2, xzr // Reset ICC_HCR_EL2 to defaults + msr_s SYS_ICH_HCR_EL2, xzr // Reset ICC_HCR_EL2 to defaults 3: #endif |