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author | Olof Johansson <olof@lixom.net> | 2019-04-28 13:02:46 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2019-04-28 13:02:46 -0700 |
commit | 0b6cf36a47bf5fc9add0b6be0b5cf6d5d3ce3ce5 (patch) | |
tree | 3fac59fb8704b06979bca9b7af0aa11f5fefa22f /arch/arm64 | |
parent | 2abeb52e6002bba50b00dfe0d3f5a9e7cef329a2 (diff) | |
parent | f36afdd0f53583759562cef3a8453919e3b86a7c (diff) | |
download | linux-stable-0b6cf36a47bf5fc9add0b6be0b5cf6d5d3ce3ce5.tar.gz linux-stable-0b6cf36a47bf5fc9add0b6be0b5cf6d5d3ce3ce5.tar.bz2 linux-stable-0b6cf36a47bf5fc9add0b6be0b5cf6d5d3ce3ce5.zip |
Merge tag 'samsung-dt64-5.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM64 changes for v5.2, second round
DTC warning fixes: move fixed-clocks, timer and pmu nodes outside of soc
node.
* tag 'samsung-dt64-5.2-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: Move fixed-clocks out of soc
arm64: dts: exynos: Move pmu and timer nodes out of soc
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm64')
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynos5433.dtsi | 49 | ||||
-rw-r--r-- | arch/arm64/boot/dts/exynos/exynos7.dtsi | 57 |
2 files changed, 54 insertions, 52 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index 41ecbc49c61e..d29d13f4694f 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -23,6 +23,31 @@ interrupt-parent = <&gic>; + arm_a53_pmu { + compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3"; + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; + }; + + arm_a57_pmu { + compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3"; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; + }; + + xxti: clock { + /* XXTI */ + compatible = "fixed-clock"; + clock-output-names = "oscclk"; + #clock-cells = <0>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -237,35 +262,11 @@ #size-cells = <1>; ranges; - arm_a53_pmu { - compatible = "arm,cortex-a53-pmu", "arm,armv8-pmuv3"; - interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; - }; - - arm_a57_pmu { - compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3"; - interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>; - }; - chipid@10000000 { compatible = "samsung,exynos4210-chipid"; reg = <0x10000000 0x100>; }; - xxti: xxti { - compatible = "fixed-clock"; - clock-output-names = "oscclk"; - #clock-cells = <0>; - }; - cmu_top: clock-controller@10030000 { compatible = "samsung,exynos5433-cmu-top"; reg = <0x10030000 0x1000>; diff --git a/arch/arm64/boot/dts/exynos/exynos7.dtsi b/arch/arm64/boot/dts/exynos/exynos7.dtsi index 967558a93d82..077d23478901 100644 --- a/arch/arm64/boot/dts/exynos/exynos7.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos7.dtsi @@ -28,6 +28,23 @@ tmuctrl0 = &tmuctrl_0; }; + arm-pmu { + compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3"; + interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; + interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>, + <&cpu_atlas2>, <&cpu_atlas3>; + }; + + fin_pll: clock { + /* XXTI */ + compatible = "fixed-clock"; + clock-output-names = "fin_pll"; + #clock-cells = <0>; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -77,12 +94,6 @@ reg = <0x10000000 0x100>; }; - fin_pll: xxti { - compatible = "fixed-clock"; - clock-output-names = "fin_pll"; - #clock-cells = <0>; - }; - gic: interrupt-controller@11001000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; @@ -469,28 +480,6 @@ status = "disabled"; }; - arm-pmu { - compatible = "arm,cortex-a57-pmu", "arm,armv8-pmuv3"; - interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu_atlas0>, <&cpu_atlas1>, - <&cpu_atlas2>, <&cpu_atlas3>; - }; - - timer { - compatible = "arm,armv8-timer"; - interrupts = <GIC_PPI 13 - (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 - (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 - (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 - (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; - }; - pmu_system_controller: system-controller@105c0000 { compatible = "samsung,exynos7-pmu", "syscon"; reg = <0x105c0000 0x5000>; @@ -635,6 +624,18 @@ }; }; }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = <GIC_PPI 13 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 14 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 11 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>, + <GIC_PPI 10 + (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>; + }; }; #include "exynos7-pinctrl.dtsi" |