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author | Juha Yrjola <juha.yrjola@solidboot.com> | 2006-12-06 17:13:46 -0800 |
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committer | Tony Lindgren <tony@atomide.com> | 2007-09-20 09:59:16 -0700 |
commit | 33c9907535cef6cb5de1269540c04664c393d09c (patch) | |
tree | 6ed91debf2685a87c726964ea56f40d2209de5dc /arch/arm | |
parent | 81cfe79b9c577139a873483654640eb3f6e78c39 (diff) | |
download | linux-stable-33c9907535cef6cb5de1269540c04664c393d09c.tar.gz linux-stable-33c9907535cef6cb5de1269540c04664c393d09c.tar.bz2 linux-stable-33c9907535cef6cb5de1269540c04664c393d09c.zip |
ARM: OMAP2: Place SMS and SDRC into smart idle mode
Place SMS and SDRC into smart idle mode
Signed-off-by: Juha Yrjola <juha.yrjola@solidboot.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/mach-omap2/io.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-omap2/memory.c | 48 |
2 files changed, 50 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 82dc70f6b779..a57a4295ce23 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -26,6 +26,7 @@ extern void omap_sram_init(void); extern int omap2_clk_init(void); extern void omap2_check_revision(void); +extern void omap2_init_memory(void); extern void gpmc_init(void); extern void omapfb_reserve_sdram(void); @@ -80,5 +81,6 @@ void __init omap2_init_common_hw(void) { omap2_mux_init(); omap2_clk_init(); + omap2_init_memory(); gpmc_init(); } diff --git a/arch/arm/mach-omap2/memory.c b/arch/arm/mach-omap2/memory.c index 85cbc2a2e663..f173aa8d896f 100644 --- a/arch/arm/mach-omap2/memory.c +++ b/arch/arm/mach-omap2/memory.c @@ -30,6 +30,38 @@ #include "prcm-regs.h" #include "memory.h" +#define SMS_BASE 0x68008000 +#define SMS_SYSCONFIG 0x010 + +#define SDRC_BASE 0x68009000 +#define SDRC_SYSCONFIG 0x010 +#define SDRC_SYSSTATUS 0x014 + +static const u32 sms_base = IO_ADDRESS(SMS_BASE); +static const u32 sdrc_base = IO_ADDRESS(SDRC_BASE); + + +static inline void sms_write_reg(int idx, u32 val) +{ + __raw_writel(val, sms_base + idx); +} + +static inline u32 sms_read_reg(int idx) +{ + return __raw_readl(sms_base + idx); +} + +static inline void sdrc_write_reg(int idx, u32 val) +{ + __raw_writel(val, sdrc_base + idx); +} + +static inline u32 sdrc_read_reg(int idx) +{ + return __raw_readl(sdrc_base + idx); +} + + static struct memory_timings mem_timings; u32 omap2_memory_get_slow_dll_ctrl(void) @@ -99,3 +131,19 @@ void omap2_init_memory_params(u32 force_lock_to_unlock_mode) /* 90 degree phase for anything below 133Mhz + disable DLL filter */ mem_timings.slow_dll_ctrl |= ((1 << 1) | (3 << 8)); } + +void __init omap2_init_memory(void) +{ + u32 l; + + l = sms_read_reg(SMS_SYSCONFIG); + l &= ~(0x3 << 3); + l |= (0x2 << 3); + sms_write_reg(SMS_SYSCONFIG, l); + + l = sdrc_read_reg(SDRC_SYSCONFIG); + l &= ~(0x3 << 3); + l |= (0x2 << 3); + sdrc_write_reg(SDRC_SYSCONFIG, l); + +} |