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| author | Andre Wolokita <Andre.Wolokita@analog.com> | 2014-09-05 10:42:28 +1000 |
|---|---|---|
| committer | Steven Miao <realmz6@gmail.com> | 2015-04-23 21:34:31 +0800 |
| commit | bb717b33aa6b01abcc78c7a18dec343a3bde9574 (patch) | |
| tree | 447338e6473068f7c3e7c883ca794df6433dc837 /arch/blackfin/mach-bf548 | |
| parent | f7fee0366c861c66c9abc8ab9a250bea2dd53c8d (diff) | |
| download | linux-stable-bb717b33aa6b01abcc78c7a18dec343a3bde9574.tar.gz linux-stable-bb717b33aa6b01abcc78c7a18dec343a3bde9574.tar.bz2 linux-stable-bb717b33aa6b01abcc78c7a18dec343a3bde9574.zip | |
debug-mmrs: Eliminate all traces of the USB_PHY_TEST MMR
Interacting with the USB_PHY_TEST MMR through debugfs was causing wide-spread
chaos in the realm (kernel panic). Expunge all references to this demonic
register.
Signed-off-by: Andre Wolokita <Andre.Wolokita@analog.com>
Diffstat (limited to 'arch/blackfin/mach-bf548')
4 files changed, 0 insertions, 14 deletions
diff --git a/arch/blackfin/mach-bf548/include/mach/cdefBF542.h b/arch/blackfin/mach-bf548/include/mach/cdefBF542.h index d09c19cd1b7b..916347901d5a 100644 --- a/arch/blackfin/mach-bf548/include/mach/cdefBF542.h +++ b/arch/blackfin/mach-bf548/include/mach/cdefBF542.h @@ -241,10 +241,6 @@ #define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2) #define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val) -/* (PHY_TEST is for ADI usage only) */ - -#define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST) -#define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val) #define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL) #define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val) #define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV) diff --git a/arch/blackfin/mach-bf548/include/mach/cdefBF547.h b/arch/blackfin/mach-bf548/include/mach/cdefBF547.h index bcb9726dea54..be83f645bba8 100644 --- a/arch/blackfin/mach-bf548/include/mach/cdefBF547.h +++ b/arch/blackfin/mach-bf548/include/mach/cdefBF547.h @@ -408,10 +408,6 @@ #define bfin_read_USB_APHY_CNTRL2() bfin_read16(USB_APHY_CNTRL2) #define bfin_write_USB_APHY_CNTRL2(val) bfin_write16(USB_APHY_CNTRL2, val) -/* (PHY_TEST is for ADI usage only) */ - -#define bfin_read_USB_PHY_TEST() bfin_read16(USB_PHY_TEST) -#define bfin_write_USB_PHY_TEST(val) bfin_write16(USB_PHY_TEST, val) #define bfin_read_USB_PLLOSC_CTRL() bfin_read16(USB_PLLOSC_CTRL) #define bfin_write_USB_PLLOSC_CTRL(val) bfin_write16(USB_PLLOSC_CTRL, val) #define bfin_read_USB_SRP_CLKDIV() bfin_read16(USB_SRP_CLKDIV) diff --git a/arch/blackfin/mach-bf548/include/mach/defBF542.h b/arch/blackfin/mach-bf548/include/mach/defBF542.h index 51161575a163..ae4b889e3606 100644 --- a/arch/blackfin/mach-bf548/include/mach/defBF542.h +++ b/arch/blackfin/mach-bf548/include/mach/defBF542.h @@ -140,9 +140,6 @@ #define USB_APHY_CALIB 0xffc03de4 /* Register used to set some calibration values */ #define USB_APHY_CNTRL2 0xffc03de8 /* Register used to prevent re-enumeration once Moab goes into hibernate mode */ -/* (PHY_TEST is for ADI usage only) */ - -#define USB_PHY_TEST 0xffc03dec /* Used for reducing simulation time and simplifies FIFO testability */ #define USB_PLLOSC_CTRL 0xffc03df0 /* Used to program different parameters for USB PLL and Oscillator */ #define USB_SRP_CLKDIV 0xffc03df4 /* Used to program clock divide value for the clock fed to the SRP detection logic */ diff --git a/arch/blackfin/mach-bf548/include/mach/defBF547.h b/arch/blackfin/mach-bf548/include/mach/defBF547.h index d55dcc0f5324..7cc7928a3c73 100644 --- a/arch/blackfin/mach-bf548/include/mach/defBF547.h +++ b/arch/blackfin/mach-bf548/include/mach/defBF547.h @@ -254,9 +254,6 @@ #define USB_APHY_CALIB 0xffc03de4 /* Register used to set some calibration values */ #define USB_APHY_CNTRL2 0xffc03de8 /* Register used to prevent re-enumeration once Moab goes into hibernate mode */ -/* (PHY_TEST is for ADI usage only) */ - -#define USB_PHY_TEST 0xffc03dec /* Used for reducing simulation time and simplifies FIFO testability */ #define USB_PLLOSC_CTRL 0xffc03df0 /* Used to program different parameters for USB PLL and Oscillator */ #define USB_SRP_CLKDIV 0xffc03df4 /* Used to program clock divide value for the clock fed to the SRP detection logic */ |