diff options
| author | Guo Ren <guoren@linux.alibaba.com> | 2020-09-07 06:20:18 +0000 |
|---|---|---|
| committer | Guo Ren <guoren@linux.alibaba.com> | 2021-01-12 09:52:40 +0800 |
| commit | 0c8a32eed1625a65798286fb73fea8710a908545 (patch) | |
| tree | 69992b6e217f5e985ebbf1f739b2af336d89138c /arch/csky/kernel/entry.S | |
| parent | 7c53f6b671f4aba70ff15e1b05148b10d58c2837 (diff) | |
| download | linux-stable-0c8a32eed1625a65798286fb73fea8710a908545.tar.gz linux-stable-0c8a32eed1625a65798286fb73fea8710a908545.tar.bz2 linux-stable-0c8a32eed1625a65798286fb73fea8710a908545.zip | |
csky: Add memory layout 2.5G(user):1.5G(kernel)
There are two ways for translating va to pa for csky:
- Use TLB(Translate Lookup Buffer) and PTW (Page Table Walk)
- Use SSEG0/1 (Simple Segment Mapping)
We use tlb mapping 0-2G and 3G-4G virtual address area and SSEG0/1
are for 2G-2.5G and 2.5G-3G translation. We could disable SSEG0
to use 2G-2.5G as TLB user mapping.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Diffstat (limited to 'arch/csky/kernel/entry.S')
| -rw-r--r-- | arch/csky/kernel/entry.S | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/arch/csky/kernel/entry.S b/arch/csky/kernel/entry.S index 5a5cabd076e1..d5f6d04b21a8 100644 --- a/arch/csky/kernel/entry.S +++ b/arch/csky/kernel/entry.S @@ -49,6 +49,7 @@ ENTRY(csky_\name) RD_PGDR r6 RD_MEH a3 + WR_MEH a3 #ifdef CONFIG_CPU_HAS_TLBI tlbi.vaas a3 sync.is @@ -64,10 +65,11 @@ ENTRY(csky_\name) WR_MCIR a2 #endif bclri r6, 0 + lrw a2, PAGE_OFFSET + add r6, a2 lrw a2, va_pa_offset ld.w a2, (a2, 0) subu r6, a2 - bseti r6, 31 mov a2, a3 lsri a2, _PGDIR_SHIFT @@ -75,10 +77,11 @@ ENTRY(csky_\name) addu r6, a2 ldw r6, (r6) + lrw a2, PAGE_OFFSET + add r6, a2 lrw a2, va_pa_offset ld.w a2, (a2, 0) subu r6, a2 - bseti r6, 31 lsri a3, PTE_INDX_SHIFT lrw a2, PTE_INDX_MSK @@ -314,6 +317,9 @@ ENTRY(csky_trap) ENTRY(csky_get_tls) USPTOKSP + RD_MEH a0 + WR_MEH a0 + /* increase epc for continue */ mfcr a0, epc addi a0, TRAP0_SIZE |