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author | Mike Habeck <habeck@sgi.com> | 2007-04-06 12:04:39 -0500 |
---|---|---|
committer | Tony Luck <tony.luck@intel.com> | 2007-04-06 15:38:12 -0700 |
commit | 2e0d232bff31973f58c33412b45fce51b6770698 (patch) | |
tree | b23f921ec8786904b56e2b6c2c42822630757cb4 /arch/ia64 | |
parent | 8a3a78d1498c4c13c3ec235a4b6338624b6ef68d (diff) | |
download | linux-stable-2e0d232bff31973f58c33412b45fce51b6770698.tar.gz linux-stable-2e0d232bff31973f58c33412b45fce51b6770698.tar.bz2 linux-stable-2e0d232bff31973f58c33412b45fce51b6770698.zip |
[IA64] SGI Altix : fix pcibr_dmamap_ate32() bug
On a SGI Altix TIOCP based PCI bus we need to include the ATE_PIO attribute
bit if we're mapping a 32bit MSI address.
Signed-off-by: Mike Habeck <habeck@sgi.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64')
-rw-r--r-- | arch/ia64/sn/pci/pcibr/pcibr_dma.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_dma.c b/arch/ia64/sn/pci/pcibr/pcibr_dma.c index 1ee977fb6ebb..95af40cb22f2 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_dma.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_dma.c @@ -96,10 +96,14 @@ pcibr_dmamap_ate32(struct pcidev_info *info, } /* - * If we're mapping for MSI, set the MSI bit in the ATE + * If we're mapping for MSI, set the MSI bit in the ATE. If it's a + * TIOCP based pci bus, we also need to set the PIO bit in the ATE. */ - if (dma_flags & SN_DMA_MSI) + if (dma_flags & SN_DMA_MSI) { ate |= PCI32_ATE_MSI; + if (IS_TIOCP_SOFT(pcibus_info)) + ate |= PCI32_ATE_PIO; + } ate_write(pcibus_info, ate_index, ate_count, ate); |