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author | Manuel Lauss <manuel.lauss@googlemail.com> | 2009-08-22 18:09:27 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2009-09-17 20:07:50 +0200 |
commit | 2882b0c63ac6085fd5c18959240b6f7d6ffb8d5b (patch) | |
tree | a95571203336aaec43dd505c81ab7dc8e46efa78 /arch/mips/alchemy/common/time.c | |
parent | 9d24bafb0d1ecf636f71a56f9d6f071f5c7a882d (diff) | |
download | linux-stable-2882b0c63ac6085fd5c18959240b6f7d6ffb8d5b.tar.gz linux-stable-2882b0c63ac6085fd5c18959240b6f7d6ffb8d5b.tar.bz2 linux-stable-2882b0c63ac6085fd5c18959240b6f7d6ffb8d5b.zip |
MIPS: Alchemy: get rid of allow_au1k_wait
Eliminate the 'allow_au1k_wait' variable. MIPS kernel installs the
Alchemy-specific wait code before timer initialization; if the C0
timer must be used for timekeeping the wait function is set to NULL
which means no wait implementation is available.
As a sideeffect, the 'wait instruction available' output in
/proc/cpuinfo now correctly indicates whether 'wait' is usable.
Run-tested on DB1200.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/alchemy/common/time.c')
-rw-r--r-- | arch/mips/alchemy/common/time.c | 15 |
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/mips/alchemy/common/time.c b/arch/mips/alchemy/common/time.c index 33fbae79af5e..f34ff8601942 100644 --- a/arch/mips/alchemy/common/time.c +++ b/arch/mips/alchemy/common/time.c @@ -36,14 +36,13 @@ #include <linux/interrupt.h> #include <linux/spinlock.h> +#include <asm/processor.h> #include <asm/time.h> #include <asm/mach-au1x00/au1000.h> /* 32kHz clock enabled and detected */ #define CNTR_OK (SYS_CNTRL_E0 | SYS_CNTRL_32S) -extern int allow_au1k_wait; /* default off for CP0 Counter */ - static cycle_t au1x_counter1_read(struct clocksource *cs) { return au_readl(SYS_RTCREAD); @@ -153,13 +152,17 @@ void __init plat_time_init(void) printk(KERN_INFO "Alchemy clocksource installed\n"); - /* can now use 'wait' */ - allow_au1k_wait = 1; return; cntr_err: - /* counters unusable, use C0 counter */ + /* + * MIPS kernel assigns 'au1k_wait' to 'cpu_wait' before this + * function is called. Because the Alchemy counters are unusable + * the C0 timekeeping code is installed and use of the 'wait' + * instruction must be prohibited, which is done most easily by + * assigning NULL to cpu_wait. + */ + cpu_wait = NULL; r4k_clockevent_init(); init_r4k_clocksource(); - allow_au1k_wait = 0; } |