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author | Maciej W. Rozycki <macro@linux-mips.org> | 2014-04-06 22:06:28 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2014-05-30 21:01:08 +0200 |
commit | 76ad023b8925d8b849a9377b77bcfa9a49f57082 (patch) | |
tree | 80e5f13553edbc66d82727acdc4d704113259074 /arch/mips/dec/setup.c | |
parent | 81d10bad0a5c5d82b1b5fea70fc84f71492e9235 (diff) | |
download | linux-stable-76ad023b8925d8b849a9377b77bcfa9a49f57082.tar.gz linux-stable-76ad023b8925d8b849a9377b77bcfa9a49f57082.tar.bz2 linux-stable-76ad023b8925d8b849a9377b77bcfa9a49f57082.zip |
MIPS: DEC: Remove the Halt button interrupt on R4k systems
On R4k DECstations the Halt button is wired to the NMI processor input
rather than an ordinary interrupt input such as on R3k DECstations. This
is possible with a different design of the CPU daughtercard that routes
the Halt button line from the baseboard connector. Additionally the
interrupt input has been reused for a different purpose on the KN04 and
KN05 R4k CPU daughtercards so it is better kept masked.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6705/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/dec/setup.c')
-rw-r--r-- | arch/mips/dec/setup.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/mips/dec/setup.c b/arch/mips/dec/setup.c index 56e6e2c23683..41bbffd9cc0e 100644 --- a/arch/mips/dec/setup.c +++ b/arch/mips/dec/setup.c @@ -23,6 +23,7 @@ #include <asm/bootinfo.h> #include <asm/cpu.h> #include <asm/cpu-features.h> +#include <asm/cpu-type.h> #include <asm/irq.h> #include <asm/irq_cpu.h> #include <asm/mipsregs.h> @@ -748,6 +749,10 @@ void __init arch_init_irq(void) cpu_fpu_mask = 0; dec_interrupt[DEC_IRQ_FPU] = -1; } + /* Free the halt interrupt unused on R4k systems. */ + if (current_cpu_type() == CPU_R4000SC || + current_cpu_type() == CPU_R4400SC) + dec_interrupt[DEC_IRQ_HALT] = -1; /* Register board interrupts: FPU and cascade. */ if (dec_interrupt[DEC_IRQ_FPU] >= 0) |