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authorPaul Burton <paul.burton@imgtec.com>2017-06-02 12:29:52 -0700
committerRalf Baechle <ralf@linux-mips.org>2017-06-28 12:22:41 +0200
commitf41d2430bbd6b64ee934915a1856fa406677d55e (patch)
tree1be1117e518ec73171306933956ff90f1ee1d3b0 /arch/mips/generic/board-sead3.c
parent571b7e69f7f775c531ffaf73ae476b1e46150f41 (diff)
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MIPS: generic/yamon-dt: Support > 256MB of RAM
YAMON can expose more than 256MB of RAM to Linux on Malta by passing an ememsize environment variable with the full size, but the kernel then needs to be careful to choose the corresponding physical memory regions, avoiding the IO memory window. This is platform dependent, and on Malta it also depends on the memory layout which varies between system controllers. Extend yamon_dt_amend_memory() to generically handle this by taking [e]memsize bytes of memory from an array of memory regions passed in as a new parameter. Board code provides this array as appropriate depending on its own memory map. [paul.burton@imgtec.com: SEAD-3 supports 384MB DDR from 0] Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/16182/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/generic/board-sead3.c')
-rw-r--r--arch/mips/generic/board-sead3.c17
1 files changed, 16 insertions, 1 deletions
diff --git a/arch/mips/generic/board-sead3.c b/arch/mips/generic/board-sead3.c
index 63fdc98738ba..97186a3a5d21 100644
--- a/arch/mips/generic/board-sead3.c
+++ b/arch/mips/generic/board-sead3.c
@@ -13,6 +13,7 @@
#include <linux/errno.h>
#include <linux/libfdt.h>
#include <linux/printk.h>
+#include <linux/sizes.h>
#include <asm/fw/fw.h>
#include <asm/io.h>
@@ -26,6 +27,15 @@
#define MIPS_REVISION_MACHINE (0xf << 4)
#define MIPS_REVISION_MACHINE_SEAD3 (0x4 << 4)
+/*
+ * Maximum 384MB RAM at physical address 0, preceding any I/O.
+ */
+static struct yamon_mem_region mem_regions[] __initdata = {
+ /* start size */
+ { 0, SZ_256M + SZ_128M },
+ {}
+};
+
static __init bool sead3_detect(void)
{
uint32_t rev;
@@ -34,6 +44,11 @@ static __init bool sead3_detect(void)
return (rev & MIPS_REVISION_MACHINE) == MIPS_REVISION_MACHINE_SEAD3;
}
+static __init int append_memory(void *fdt)
+{
+ return yamon_dt_append_memory(fdt, mem_regions);
+}
+
static __init int remove_gic(void *fdt)
{
const unsigned int cpu_ehci_int = 2;
@@ -145,7 +160,7 @@ static __init const void *sead3_fixup_fdt(const void *fdt,
if (err)
panic("Unable to patch FDT: %d", err);
- err = yamon_dt_append_memory(fdt_buf);
+ err = append_memory(fdt_buf);
if (err)
panic("Unable to patch FDT: %d", err);