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| author | Maciej W. Rozycki <macro@linux-mips.org> | 2015-05-27 14:15:15 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-06-21 21:52:41 +0200 |
| commit | 3bcb03f3a7160e411c5f335028a5c70b32f0edb7 (patch) | |
| tree | 74abe01f8ee04361686a6e1c9330858868849f6c /arch/mips/lib | |
| parent | dbfbf60f4a6b058b873b0d37e272fc3bd2f1356d (diff) | |
| download | linux-stable-3bcb03f3a7160e411c5f335028a5c70b32f0edb7.tar.gz linux-stable-3bcb03f3a7160e411c5f335028a5c70b32f0edb7.tar.bz2 linux-stable-3bcb03f3a7160e411c5f335028a5c70b32f0edb7.zip | |
MIPS: tlb-r3k: Move CP0.Wired register initialisation to `tlb_init'
Move the initialisation of the CP0.Wired register implemented by Toshiba
TX3922 and TX3927 processors from `tx39_cache_init' to `tlb_init' where
it belongs, correcting code structure and making sure initialisation
does not rely on `tx39_cache_init' being called before `tlb_init' to
work correctly.
Make `r3k_have_wired_reg' static as it's no longer externally referred
to; remove a stale declaration too.
Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10195/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lib')
| -rw-r--r-- | arch/mips/lib/r3k_dump_tlb.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/arch/mips/lib/r3k_dump_tlb.c b/arch/mips/lib/r3k_dump_tlb.c index 1335e4394e33..8e0d3cff8ae4 100644 --- a/arch/mips/lib/r3k_dump_tlb.c +++ b/arch/mips/lib/r3k_dump_tlb.c @@ -14,8 +14,6 @@ #include <asm/pgtable.h> #include <asm/tlbdebug.h> -extern int r3k_have_wired_reg; /* defined in tlb-r3k.c */ - static void dump_tlb(int first, int last) { int i; |