diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2006-03-11 08:18:41 +0000 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-03-21 13:27:47 +0000 |
| commit | a3dddd560ee936495466d85ecc97490d171e8d31 (patch) | |
| tree | e9b5d778b5249ce348d2285a9b886b83c510d813 /arch/mips/mips-boards/sim | |
| parent | 59b3e8e9aac69d2d02853acac7e2affdfbabca50 (diff) | |
| download | linux-stable-a3dddd560ee936495466d85ecc97490d171e8d31.tar.gz linux-stable-a3dddd560ee936495466d85ecc97490d171e8d31.tar.bz2 linux-stable-a3dddd560ee936495466d85ecc97490d171e8d31.zip | |
[MIPS] War on whitespace: cleanup initial spaces followed by tabs.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mips-boards/sim')
| -rw-r--r-- | arch/mips/mips-boards/sim/sim_IRQ.c | 2 | ||||
| -rw-r--r-- | arch/mips/mips-boards/sim/sim_irq.S | 2 | ||||
| -rw-r--r-- | arch/mips/mips-boards/sim/sim_smp.c | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/mips-boards/sim/sim_IRQ.c b/arch/mips/mips-boards/sim/sim_IRQ.c index 9987a85aabeb..5b84c7fe1022 100644 --- a/arch/mips/mips-boards/sim/sim_IRQ.c +++ b/arch/mips/mips-boards/sim/sim_IRQ.c @@ -96,7 +96,7 @@ andi a0, s0, CAUSEF_IP3 # delay slot, check hw1 interrupt #else beq a0, zero, 1f # delay slot, check hw3 interrupt - andi a0, s0, CAUSEF_IP5 + andi a0, s0, CAUSEF_IP5 #endif /* Wheee, combined hardware level zero interrupt. */ diff --git a/arch/mips/mips-boards/sim/sim_irq.S b/arch/mips/mips-boards/sim/sim_irq.S index 835f0387fcd4..da52297a2216 100644 --- a/arch/mips/mips-boards/sim/sim_irq.S +++ b/arch/mips/mips-boards/sim/sim_irq.S @@ -42,7 +42,7 @@ and s0, s1 #if defined(CONFIG_CPU_MIPS32) || defined(CONFIG_CPU_MIPS64) - .set mips32 + .set mips32 clz a0, s0 .set mips0 negu a0 diff --git a/arch/mips/mips-boards/sim/sim_smp.c b/arch/mips/mips-boards/sim/sim_smp.c index 19824359f5de..a9f0c2bfe4ad 100644 --- a/arch/mips/mips-boards/sim/sim_smp.c +++ b/arch/mips/mips-boards/sim/sim_smp.c @@ -115,7 +115,7 @@ void prom_prepare_cpus(unsigned int max_cpus) #ifdef CONFIG_MIPS_MT_SMTC void mipsmt_prepare_cpus(int c); /* - * As noted above, we can assume a single CPU for now + * As noted above, we can assume a single CPU for now * but it may be multithreaded. */ |