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| author | Hauke Mehrtens <hauke@hauke-m.de> | 2018-12-09 16:49:57 +0100 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-01-18 11:33:04 -0800 |
| commit | f263f2a2c682fddc7521a1d1efc01d58e1d70d84 (patch) | |
| tree | 1abbe858e7b711a3e25438cf716dfcf86d304dcd /arch/mips/mm | |
| parent | 1c7fc5cbc33980acd13d668f1c8f0313d6ae9fd8 (diff) | |
| download | linux-stable-f263f2a2c682fddc7521a1d1efc01d58e1d70d84.tar.gz linux-stable-f263f2a2c682fddc7521a1d1efc01d58e1d70d84.tar.bz2 linux-stable-f263f2a2c682fddc7521a1d1efc01d58e1d70d84.zip | |
MIPS: Compile post DMA flush only when needed
dma_sync_phys() is only called for some CPUs when a mapping is removed.
Add ARCH_HAS_SYNC_DMA_FOR_CPU only for the CPUs listed in
cpu_needs_post_dma_flush() which need this extra call and do not compile
this code in for other CPUs. We need this for R10000, R12000, BMIPS5000
CPUs and CPUs supporting MAAR which was introduced in MIPS32r5.
This will hopefully improve the performance of the not affected devices.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: ralf@linux-mips.org
Cc: jhogan@kernel.org
Cc: linux-mips@vger.kernel.org
Cc: nbd@nbd.name
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/dma-noncoherent.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c index cb38461391cb..f7e0fd6b7619 100644 --- a/arch/mips/mm/dma-noncoherent.c +++ b/arch/mips/mm/dma-noncoherent.c @@ -145,12 +145,14 @@ void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr, dma_sync_phys(paddr, size, dir); } +#ifdef CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr, size_t size, enum dma_data_direction dir) { if (cpu_needs_post_dma_flush(dev)) dma_sync_phys(paddr, size, dir); } +#endif void arch_dma_cache_sync(struct device *dev, void *vaddr, size_t size, enum dma_data_direction direction) |