diff options
author | Kumar Gala <galak@kernel.crashing.org> | 2011-10-06 02:53:40 +0000 |
---|---|---|
committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2011-11-17 16:26:07 +1100 |
commit | 187b9f2aa769198daa7cf8054abb65a08b8d8b47 (patch) | |
tree | 722bbeb3aa73e59b1b6b3fb883c287adb7583a53 /arch/powerpc/include/asm/reg_booke.h | |
parent | b95bc2191412f5ecf2781c966110a13fa82a80d3 (diff) | |
download | linux-stable-187b9f2aa769198daa7cf8054abb65a08b8d8b47.tar.gz linux-stable-187b9f2aa769198daa7cf8054abb65a08b8d8b47.tar.bz2 linux-stable-187b9f2aa769198daa7cf8054abb65a08b8d8b47.zip |
powerpc/book3e-64: Fix debug support for userspace
With the introduction of CONFIG_PPC_ADV_DEBUG_REGS user space debug is
broken on Book-E 64-bit parts that support delayed debug events. When
switch_booke_debug_regs() sets DBCR0 we'll start getting debug events as
MSR_DE is also set and we aren't able to handle debug events from kernel
space.
We can remove the hack that always enables MSR_DE and loads up DBCR0 and
just utilize switch_booke_debug_regs() to get user space debug working
again.
We still need to handle critical/debug exception stacks & proper
save/restore of state for those exception levles to support debug events
from kernel space like we have on 32-bit.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/include/asm/reg_booke.h')
-rw-r--r-- | arch/powerpc/include/asm/reg_booke.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h index 28cdbd9f399c..03c48e819c8e 100644 --- a/arch/powerpc/include/asm/reg_booke.h +++ b/arch/powerpc/include/asm/reg_booke.h @@ -31,7 +31,7 @@ #define MSR_ MSR_ME | MSR_CE #define MSR_KERNEL MSR_ | MSR_64BIT -#define MSR_USER32 MSR_ | MSR_PR | MSR_EE | MSR_DE +#define MSR_USER32 MSR_ | MSR_PR | MSR_EE #define MSR_USER64 MSR_USER32 | MSR_64BIT #elif defined (CONFIG_40x) #define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE) |