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| author | Michael Neuling <mikey@neuling.org> | 2013-08-26 13:55:57 +1000 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-08-27 15:05:22 +1000 |
| commit | bc683a7e51c5c838bc74316125bebec92af74f12 (patch) | |
| tree | 5e747e76bff1b853ec1a97dbb2fdb37f89d76460 /arch/powerpc/kernel/traps.c | |
| parent | 3f1f4311881b330a7b5429dd101e676df191b159 (diff) | |
| download | linux-stable-bc683a7e51c5c838bc74316125bebec92af74f12.tar.gz linux-stable-bc683a7e51c5c838bc74316125bebec92af74f12.tar.bz2 linux-stable-bc683a7e51c5c838bc74316125bebec92af74f12.zip | |
powerpc: Cleanup handling of the DSCR bit in the FSCR register
As suggested by paulus we can simplify the Data Stream Control Register
(DSCR) Facility Status and Control Register (FSCR) handling.
Firstly, we simplify the asm by using a rldimi.
Secondly, we now use the FSCR only to control the DSCR facility, rather
than both the FSCR and HFSCR. Users will see no functional change from
this but will get a minor speedup as they will trap into the kernel only
once (rather than twice) when they first touch the DSCR. Also, this
changes removes a bunch of ugly FTR_SECTION code.
Signed-off-by: Michael Neuling <mikey@neuling.org>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/kernel/traps.c')
| -rw-r--r-- | arch/powerpc/kernel/traps.c | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 529a9329e8d9..f783c932faeb 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c @@ -1342,13 +1342,10 @@ void facility_unavailable_exception(struct pt_regs *regs) if (status == FSCR_DSCR_LG) { /* User is acessing the DSCR. Set the inherit bit and allow * the user to set it directly in future by setting via the - * H/FSCR DSCR bit. + * FSCR DSCR bit. We always leave HFSCR DSCR set. */ current->thread.dscr_inherit = 1; - if (hv) - mtspr(SPRN_HFSCR, value | HFSCR_DSCR); - else - mtspr(SPRN_FSCR, value | FSCR_DSCR); + mtspr(SPRN_FSCR, value | FSCR_DSCR); return; } |